PIC18F27J13-I/SP Microchip Technology, PIC18F27J13-I/SP Datasheet - Page 155

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PIC18F27J13-I/SP

Manufacturer Part Number
PIC18F27J13-I/SP
Description
IC PIC MCU 128KB FLASH 28SPDIP
Manufacturer
Microchip Technology
Series
PIC® XLP™ 18Fr

Specifications of PIC18F27J13-I/SP

Core Size
8-Bit
Program Memory Size
128KB (64K x 16)
Core Processor
PIC
Speed
48MHz
Connectivity
I²C, LIN, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
22
Program Memory Type
FLASH
Ram Size
3.8K x 8
Voltage - Supply (vcc/vdd)
2.15 V ~ 3.6 V
Data Converters
A/D 10x10b/12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Controller Family/series
PIC18
Cpu Speed
48MHz
Digital Ic Case Style
DIP
Supply Voltage Range
1.8V To 5.5V
Embedded Interface Type
I2C, SPI, USART
Rohs Compliant
Yes
Core
PIC
Processor Series
PIC18F
Data Bus Width
8 bit
Maximum Clock Frequency
48 MHz
Data Ram Size
3.76 KB
On-chip Adc
Yes
Number Of Programmable I/os
2
Number Of Timers
8
Operating Supply Voltage
2.15 V to 3.6 V
Operating Temperature Range
- 40 C to + 85 C
A/d Bit Size
12 bit
A/d Channels Available
10
Height
3.43 mm
Interface Type
I2C, SPI, USART
Length
34.4 mm
Maximum Operating Temperature
+ 85 C
Minimum Operating Temperature
- 40 C
Supply Voltage (max)
3.6 V
Supply Voltage (min)
2.15 V
Width
7.24 mm
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
MA180030 - BOARD DEMO PIC18F47J13 FS USBMA180029 - BOARD DEMO PIC18F47J53 FS USB
Eeprom Size
-
Lead Free Status / Rohs Status
 Details
REGISTER 10-10: LATx: PORTx OUTPUT LATCH REGISTER
REGISTER 10-11: LATE: PORTE OUTPUT LATCH REGISTER
REGISTER 10-12: WPUB: WEAK PULL-UP PORTB REGISTER
 2010 Microchip Technology Inc.
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 7-0
Note 1:
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 7-3
bit 2-0
Note 1:
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 7-0
R/W-x/u
WPUB7
LATx7
R/W-1
U-0
2:
2:
Register Description for LATA, LATB, LATC and LATD.
Writes to PORTA are written to corresponding LATA register. Reads from PORTA register is return of I/O
pin values.
Available on PIC18(L)F4XK22 devices only.
Writes to PORTA are written to corresponding LATA register. Reads from PORTA register is return of I/O
pin values.
LATx<7:0>: PORTx Output Latch bit value
Unimplemented: Read as ‘0’
LATE<2:0>: PORTE Output Latch bit value
WPUB<7:0>: Weak Pull-up Register bits
1 = Pull-up enabled on PORT pin
0 = Pull-up disabled on PORT pin
R/W-x/u
WPUB6
LATx6
R/W-1
U-0
W = Writable bit
‘1’ = Bit is set
W = Writable bit
‘1’ = Bit is set
W = Writable bit
‘1’ = Bit is set
R/W-x/u
WPUB5
LATx5
R/W-1
U-0
R/W-x/u
WPUB4
LATx4
R/W-1
U-0
Preliminary
(2)
(2)
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
R/W-x/u
WPUB3
LATx3
R/W-1
U-0
PIC18(L)F2X/4XK22
(1)
(1)
R/W-x/u
R/W-x/u
WPUB2
LATE2
LATx2
R/W-1
x = Bit is unknown
x = Bit is unknown
x = Bit is unknown
R/W-x/u
R/W-x/u
WPUB1
LATE1
LATx1
R/W-1
DS41412D-page 155
R/W-x/u
R/W-x/u
WPUB0
LATE0
LATx0
R/W-1
bit 0
bit 0
bit 0

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