PIC18F27J13-I/SP Microchip Technology, PIC18F27J13-I/SP Datasheet - Page 451

• Manufacturer Part Number: PIC18F27J13-I/SP
• Description: IC PIC MCU 128KB FLASH 28SPDIP
• Manufacturer: Microchip Technology
• Series: PIC® XLP™ 18Fr

Specifications of PIC18F27J13-I/SP

• Core Size: 8-Bit
• Program Memory Size: 128KB (64K x 16)
• Core Processor: PIC
• Speed: 48MHz
• Connectivity: I²C, LIN, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 22
• Program Memory Type: FLASH
• Ram Size: 3.8K x 8
• Voltage - Supply (vcc/vdd): 2.15 V ~ 3.6 V
• Data Converters: A/D 10x10b/12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Controller Family/series: PIC18
• Cpu Speed: 48MHz
• Digital Ic Case Style: DIP
• Supply Voltage Range: 1.8V To 5.5V
• Embedded Interface Type: I2C, SPI, USART
• Rohs Compliant: Yes
• Core: PIC
• Processor Series: PIC18F
• Data Bus Width: 8 bit
• Maximum Clock Frequency: 48 MHz
• Data Ram Size: 3.76 KB
• On-chip Adc: Yes
• Number Of Programmable I/os: 2
• Number Of Timers: 8
• Operating Supply Voltage: 2.15 V to 3.6 V
• Operating Temperature Range: - 40 C to + 85 C
• A/d Bit Size: 12 bit
• A/d Channels Available: 10
• Height: 3.43 mm
• Interface Type: I2C, SPI, USART
• Length: 34.4 mm
• Maximum Operating Temperature: + 85 C
• Minimum Operating Temperature: - 40 C
• Supply Voltage (max): 3.6 V
• Supply Voltage (min): 2.15 V
• Width: 7.24 mm
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: MA180030 - BOARD DEMO PIC18F47J13 FS USBMA180029 - BOARD DEMO PIC18F47J53 FS USB
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

FIGURE 27-13:
TABLE 27-14: EXAMPLE SPI MODE REQUIREMENTS (SLAVE MODE TIMING, CKE = 0 OR 1)
 2010 Microchip Technology Inc.
70
71
72
73
74
75
76
77
80
82
83
Param.
No.
(CKP = 0)
(CKP = 1)
SDI
SDI
SS
SCK
SCK
SDO
Note:
TssL2scH,
TssL2scL
TscH
TscL
TdiV2scH,
TdiV2scL
TscH2diL,
TscL2diL
TdoR
TdoF
TssH2doZ
TscH2doV,
TscL2doV
TssL2doV
TscH2ssH,
TscL2ssH
Symbol
Refer to
SS  to SCK  or SCK  Input
SCK Input High Time
SCK Input Low Time
Setup Time of SDI Data Input to SCK Edge
Hold Time of SDI Data Input to SCK Edge
SDO Data Output Rise Time
SDO Data Output Fall Time
SS to SDO Output High-Impedance
SDO Data Output Valid after SCK Edge
SDO Data Output Valid after SS  Edge
SS  after SCK edge
Figure 27-4
EXAMPLE SPI SLAVE MODE TIMING (CKE = 0)
70
80
71
for load conditions.
73
MSb In
MSb
74
Characteristic
72
75, 76
Preliminary
bit 6 - - - - - -1
bit 6 - - - -1
Continuous
Continuous
PIC18(L)F2X/4XK22
78
79
1.5 T
79
78
LSb In
LSb
Min
T
25
30
25
25
10
CY
—
—
—
—
CY
83
+ 40
77
Max
30
20
50
60
60
—
—
—
—
—
—
DS41412D-page 451
Units Conditions
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns