MCHC912B32CFUE8 Freescale Semiconductor, MCHC912B32CFUE8 Datasheet - Page 184

• Manufacturer Part Number: MCHC912B32CFUE8
• Description: IC MCU 32K FLASH 8MHZ 80-QFP
• Manufacturer: Freescale Semiconductor
• Series: HC12r

Specifications of MCHC912B32CFUE8

• Core Processor: CPU12
• Core Size: 16-Bit
• Speed: 8MHz
• Connectivity: SCI, SPI
• Peripherals: POR, PWM, WDT
• Number Of I /o: 63
• Program Memory Size: 32KB (32K x 8)
• Program Memory Type: FLASH
• Eeprom Size: 768 x 8
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 80-QFP
• Cpu Family: HC12
• Device Core Size: 16b
• Frequency (max): 8MHz
• Interface Type: SCI/SPI
• Total Internal Ram Size: 1KB
• # I/os (max): 63
• Operating Supply Voltage (typ): 5V
• Operating Supply Voltage (max): 5.5V
• Operating Supply Voltage (min): 4.5V
• On-chip Adc: 8-chx10-bit
• Instruction Set Architecture: CISC
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 80
• Package Type: PQFP
• Package: 80PQFP
• Family Name: HC12
• Maximum Speed: 8 MHz
• Operating Supply Voltage: 5 V
• Data Bus Width: 16 Bit
• Number Of Programmable I/os: 63
• Processor Series: HC912B
• Core: HC12
• Data Ram Size: 1 KB
• Maximum Clock Frequency: 8 MHz
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: EWHCS12
• Development Tools By Supplier: M68EVB912B32E
• Minimum Operating Temperature: - 40 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Enhanced Capture Timer (ECT) Module
TCBYP — Main Timer Divider Chain Bypass Bit
13.4.21 Timer Port Data Register
Read: Anytime (input return pin level; outputs return data register contents)
Write: Data stored in an internal latch (drives pins only if configured for output)
Since the output compare 7 register (OC7) shares pins with the pulse accumulator input, the only way for
the pulse accumulator to receive an independent input from OC7 is by setting both OM7 and OL7 to be
0, and also OC7M7 in OC7M register to be 0. OC7 can still reset the counter if enabled while PT7 is used
as an input to the pulse accumulator.
PORTT can be read anytime. When configured as an input, a read will return the pin level. When
configured as an output, a read will return the latched output data.
13.4.22 Data Direction Register for Timer Port
Read: Anytime
Write: Anytime
184
0 = Normal operation
1 = For testing only. The 16-bit free-running timer counter is divided into two 8-bit halves and the
prescaler is bypassed. The clock drives both halves directly. When the high byte of timer
counter TCNT ($84) overflows from $FF to $00, the TOF flag in TFLG2 ($8F) will be set.
Address: $00AE
Address: $00AF
Writes do not change pin state when the pin is configured for timer output.
The minimum pulse width for pulse accumulator input should always be
greater than the width of two module clocks due to input synchronizer
circuitry. The minimum pulse width for the input capture should always be
greater than the width of two module clocks due to input synchronizer
circuitry.
Timer:
Reset:
Reset:
Read:
Read:
Write:
Write:
Figure 13-43. Data Direction Register for Timer Port (DDRT)
DDT7
I/0C7
Bit 7
Bit 7
PT7
0
0
Figure 13-42. Timer Port Data Register (PORTT)
I/OC6
DDT6
PT6
6
0
6
0
M68HC12B Family Data Sheet, Rev. 9.1
I/OC5
DDT5
PT5
5
0
5
0
NOTE
I/OC4
DDT4
PT4
4
0
4
0
DDT3
I/OC3
PT3
3
0
3
0
I/OC2
DDT2
PT2
2
0
2
0
I/OC1
DDT1
PT1
1
0
1
0
Freescale Semiconductor
I/OC0
DDT0
Bit 0
Bit 0
PT0
0
0