HD64F7144F50V Renesas Electronics America, HD64F7144F50V Datasheet - Page 249

IC SUPERH MCU FLASH 256K 112QFP

HD64F7144F50V

Manufacturer Part Number
HD64F7144F50V
Description
IC SUPERH MCU FLASH 256K 112QFP
Manufacturer
Renesas Electronics America
Series
SuperH® SH7144r
Datasheets

Specifications of HD64F7144F50V

Core Processor
SH-2
Core Size
32-Bit
Speed
50MHz
Connectivity
EBI/EMI, I²C, SCI
Peripherals
DMA, POR, PWM, WDT
Number Of I /o
74
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
112-QFP
For Use With
HS0005KCU11H - EMULATOR E10A-USB H8S(X),SH2(A)EDK7145 - DEV EVALUATION KIT SH7145
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

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6
6.1.53
Description: Sets the repeat count to the SR register’s RC counter. When the operand is a register,
the bottom 12 bits are used as the repeat count. When the operand is an immediate data value, 8
bits are used as the repeat count. Set repeat control flags to RF1, RF0 bits of the SR register. Use
of the SETRC instruction is subject to any limitations. Refer to section 4.18, DSP Repeat (Loop)
Control, for more information.
Operation:
Format
SETRC Rm
SETRC #imm
SETRC(long m) /* SETRC Rm */
{
}
long temp;
temp=(R[m] & 0x00000FFF)<<16;
SR&=0x00000FF3;
SR|=temp;
RF1=Repeat_Control_Flag1;
RF0=Repeat_Control_Flag0;
PC+=2;
SETRC (Set Repeat Count to RC): System Control Instruction
Abstract
Rm[11:0]
RCCSR[27:16]
Repeat control flag
imm
zeros
Repeat control flag
RF1, RF0
RF1, RF0
RC [23:26]
SR[27:24],
Code
0100mmmm00010100 1
10000010iiiiiiii 1
Rev. 5.00 Jun 30, 2004 page 233 of 512
Section 6 Instruction Descriptions
Cycle
T
Bit SH-1 SH-2
REJ09B0171-0500O
Instructions
Applicable
SH-
DSP

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