HD64F7144F50V Renesas Electronics America, HD64F7144F50V Datasheet - Page 503
![IC SUPERH MCU FLASH 256K 112QFP](/photos/12/21/122194/hd64f7144f50v_sml.jpg)
HD64F7144F50V
Manufacturer Part Number
HD64F7144F50V
Description
IC SUPERH MCU FLASH 256K 112QFP
Manufacturer
Renesas Electronics America
Series
SuperH® SH7144r
Specifications of HD64F7144F50V
Core Processor
SH-2
Core Size
32-Bit
Speed
50MHz
Connectivity
EBI/EMI, I²C, SCI
Peripherals
DMA, POR, PWM, WDT
Number Of I /o
74
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
112-QFP
For Use With
HS0005KCU11H - EMULATOR E10A-USB H8S(X),SH2(A)EDK7145 - DEV EVALUATION KIT SH7145
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Available stocks
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Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
HD64F7144F50V
Manufacturer:
RENESAS
Quantity:
450
Company:
Part Number:
HD64F7144F50V
Manufacturer:
Renesas Electronics America
Quantity:
10 000
Part Number:
HD64F7144F50V
Manufacturer:
RENESAS/瑞萨
Quantity:
20 000
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7.4.5
Conditional Branch Instructions (Common): Include the following instruction types:
The pipeline has three stages: IF, ID, and EX. Condition verification is performed in the ID stage.
Conditionally branched instructions are not delay branched.
1. When condition is satisfied
2. When condition is not satisfied
BF label
BT label
The branch destination address is calculated in the EX stage. The two instructions after the
conditional branch instruction (instruction A) are fetched but discarded. The branch destination
instruction begins its fetch from the slot following the slot which has the EX stage of
instruction A (figure 7.78).
If it is determined that conditions are not satisfied at the ID stage, the EX stage proceeds
without doing anything. The next instruction also executes a fetch (figure 7.79).
Third instruction in series
Third instruction in series
Branch Instructions
Branch destination
Figure 7.79 Branch Instruction when Condition Is Not Satisfied
Next instruction
Figure 7.78 Branch Instruction when Condition Is Satisfied
Next instruction
Instruction A
Instruction A
.....
.....
.....
.....
IF
IF
ID
ID
IF
IF
EX
EX
—
ID
—
IF
IF
EX
—
ID
IF
IF
Rev. 5.00 Jun 30, 2004 page 487 of 512
.....
ID
EX
ID
IF
(Fetched but discarded)
(Fetched but discarded)
EX
EX
.....
ID
EX
Section 7 Pipeline Operation
.....
.....
.....
REJ09B0171-0500O
: Slot
: Slot
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