HD64F7144F50V Renesas Electronics America, HD64F7144F50V Datasheet - Page 67

IC SUPERH MCU FLASH 256K 112QFP

HD64F7144F50V

Manufacturer Part Number
HD64F7144F50V
Description
IC SUPERH MCU FLASH 256K 112QFP
Manufacturer
Renesas Electronics America
Series
SuperH® SH7144r
Datasheets

Specifications of HD64F7144F50V

Core Processor
SH-2
Core Size
32-Bit
Speed
50MHz
Connectivity
EBI/EMI, I²C, SCI
Peripherals
DMA, POR, PWM, WDT
Number Of I /o
74
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
112-QFP
For Use With
HS0005KCU11H - EMULATOR E10A-USB H8S(X),SH2(A)EDK7145 - DEV EVALUATION KIT SH7145
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

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6
When the memory read destination operand is the same as the ALU operation source operand and
the data transfer instruction program is written on the same line as the ALU operation, data loaded
from memory in the memory access stage (MA) cannot be used as the source operand of the ALU
operation instruction. When this occurs, the result of the instruction executed first is used as the
source operand of the ALU operation and is updated as the destination operand of the data load
instruction thereafter. Figure 4.7 is a flowchart of the operation.
PADD X0, Y0, A0
Guard bits
MOVX,
MOVX
ADD
Slot
Figure 4.6 ALU Fixed Decimal Point Operation Flowchart
31
Source 1
MOVX.W @ R4+R8, X0
MOVX.W @ R4+, X0
Guard bits
IF
Figure 4.7 Sample Processing Flowchart
1
Destination
ID
31
IF
2
0
ALU
Guard bits
dressing)
EX (ad-
ID
3
The result of the previous step is used.
31
Rev. 5.00 Jun 30, 2004 page 51 of 512
0
dressing)
(MOVX)
EX (ad-
Source 2
MA
4
GT
Section 4 Instruction Features
Z
(MOVX)
(nop)
DSP
DSR
MA
5
N
0
REJ09B0171-0500O
V
(ADD)
DC
DSP
6

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