LPC3230FET296,551 NXP Semiconductors, LPC3230FET296,551 Datasheet - Page 50

• Manufacturer Part Number: LPC3230FET296,551
• Description: IC ARM9 MCU 256K 296-TFBGA
• Manufacturer: NXP Semiconductors
• Series: LPC32x0r

Specifications of LPC3230FET296,551

• Core Processor: ARM9
• Core Size: 16/32-Bit
• Speed: 266MHz
• Connectivity: EBI/EMI, I²C, IrDA, Microwire, SPI, SSI, SSP, UART/USART, USB OTG
• Peripherals: DMA, I²S, LCD, Motor Control PWM, PWM, WDT
• Number Of I /o: 51
• Program Memory Type: ROMless
• Ram Size: 256K x 8
• Voltage - Supply (vcc/vdd): 0.9 V ~ 3.6 V
• Data Converters: A/D 3x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 296-TFBGA
• Processor Series: LPC32
• Core: ARM926EJ-S
• Data Bus Width: 32 bit
• Data Ram Size: 256 KB
• Interface Type: I2C, I2S, UART, USB
• Maximum Clock Frequency: 20 MHz
• Number Of Programmable I/os: 51
• Number Of Timers: 6
• Operating Supply Voltage: 2.7 V to 3.6 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: MDK-ARM, RL-ARM, ULINK2
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 8 Channel
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -
• Lead Free Status / Rohs Status: Details
• Other names: 568-4531; 935287119551

NXP Semiconductors
Table 8.
T
[1]
[2]
[3]
[4]
[5]
[6]
[7]
[8]
[9]
[10] The applicable V
[11] 3-state outputs go into 3-state mode when the applicable V
[12] Accounts for 100 mV voltage drop in all supply lines.
[13] Allowed as long as the current limit does not exceed the maximum current allowed by the device.
LPC3220_30_40_50_1
Product data sheet
Symbol
V
I
I
I
I
I
Z
Oscillator input/output pins
V
V
Reset pin
V
V
V
I
I
I
I
OH
OL
OZ
OHS
OLS
IL
IH
OZ
latch
amb
o
OL
i(xtal)
o(xtal)
I
IH
IL
Typical ratings are not guaranteed. The values listed are at room temperature (25 °C), nominal supply voltages.
Applies to VDD_CORE pins.
Applies to pins VDD_RTC, VDD_RTCCORE, and VDD_RTCOSC.
Applies to pins VDD_COREFXD, VDD_OSC, VDD_PLL397, VDD_PLLHCLK, and VDD_PLLUSB.
Applies when using 1.8 V Mobile DDR or Mobile SDR SDRAM.
Applies when using 2.5 V DDR memory.
Applies when using 3.3 V SDR SDRAM and SRAM.
Referenced to the applicable V
Including voltage on outputs in 3-state mode.
=
−
40
°
Parameter
LOW-level
output voltage
HIGH-level
output current
LOW-level
output current
OFF-state
output current
HIGH-level short-circuit
output current
LOW-level short-circuit
output current
output impedance
crystal input voltage
crystal output voltage
input voltage
HIGH-level input voltage 1.2 V inputs
LOW-level input voltage 1.2 V inputs
LOW-level input current
HIGH-level input current V
OFF-state output current V
I/O latch-up current
Static characteristics
C to +85
DD
°
voltage for the pin must be present.
C, unless otherwise specified.
DD
for the pin.
…continued
Conditions
1.2 V outputs; I
V
V
V
no pull-up/down
V
V
V
on pins RTCX_IN and
SYSX_IN
on pins RTCX_OUT and
SYSX_OUT
V
no pull-up/down
−(1.5V
OH
OL
O
DD(1V2)
OL
DD(1V2)
I
I
O
= 0 V; no pull-up
= V
= 0 V; V
= 0 V; V
= 0.4 V
= V
All information provided in this document is subject to legal disclaimers.
= V
DD
DD
DD(1V2)
DD(1V2)
; no pull-down
= 1.8 V; V
= 1.2 V
) < V
Rev. 01.03 — 16 March 2010
O
O
= V
= V
I
< (1.5V
OL
− 0.4 V
DD(1V2)
DD
= 4 mA
OH
DD
;
voltage for the pin is grounded.
= 0 V
DD
;
)
[8][12]
[8][12]
[8][13]
[12]
[13]
[10]
[8]
[8]
[8]
[8]
[8]
Min
-
−4
3
-
-
-
40
−0.5
−0.5
0
0.7 × V
-
-
-
-
-
LPC3220/30/40/50
DD(1V2)
16/32-bit ARM microcontrollers
Typ
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
[1]
Max
0.4
-
-
1.5
−135
135
60
+1.3
+1.3
1.95
-
0.3 × V
1
1
1
100
© NXP B.V. 2010. All rights reserved.
DD(1V2)
50 of 77
Unit
V
mA
mA
μA
mA
mA
Ω
V
V
V
V
V
μA
μA
μA
mA