LPC3230FET296,551 NXP Semiconductors, LPC3230FET296,551 Datasheet - Page 67

IC ARM9 MCU 256K 296-TFBGA

LPC3230FET296,551

Manufacturer Part Number
LPC3230FET296,551
Description
IC ARM9 MCU 256K 296-TFBGA
Manufacturer
NXP Semiconductors
Series
LPC32x0r
Datasheet

Specifications of LPC3230FET296,551

Core Processor
ARM9
Core Size
16/32-Bit
Speed
266MHz
Connectivity
EBI/EMI, I²C, IrDA, Microwire, SPI, SSI, SSP, UART/USART, USB OTG
Peripherals
DMA, I²S, LCD, Motor Control PWM, PWM, WDT
Number Of I /o
51
Program Memory Type
ROMless
Ram Size
256K x 8
Voltage - Supply (vcc/vdd)
0.9 V ~ 3.6 V
Data Converters
A/D 3x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
296-TFBGA
Processor Series
LPC32
Core
ARM926EJ-S
Data Bus Width
32 bit
Data Ram Size
256 KB
Interface Type
I2C, I2S, UART, USB
Maximum Clock Frequency
20 MHz
Number Of Programmable I/os
51
Number Of Timers
6
Operating Supply Voltage
2.7 V to 3.6 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
MDK-ARM, RL-ARM, ULINK2
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 8 Channel
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-
Lead Free Status / Rohs Status
 Details
Other names
568-4531
935287119551

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
LPC3230FET296,551
Manufacturer:
NXP Semiconductors
Quantity:
10 000
NXP Semiconductors
Table 19.
T
[1]
LPC3220_30_40_50_1
Product data sheet
Symbol
Common to SPI1 and SPI2
T
SPI1
t
t
t
t
SPI2
t
t
t
t
SPIDSU
SPIDH
SPIDV
SPIOH
SPIDSU
SPIDH
SPIDV
SPIOH
Fig 19.
amb
SPICYC
T
=
HCLK
40
= period time of SPI IP block input clock (HCLK)
MLC NAND flash memory status timing
°
Dynamic characteristics of SPI pins on SPI master controller
C to +85
FLASH_IO[7:0]
FLASH_CLE
11.9.1 SPI
FLASH_WR
FLASH_RD
FLASH_CE
11.9 SPI and SSP Controller
Parameter
SPI cycle time
SPI data set-up time
SPI data hold time
SPI enable to output data valid time
SPI output data hold time
SPI data set-up time
SPI data hold time
SPI enable to output data valid time
SPI output data hold time
°
C.
t
t
CS
t
CLS
t
DS
WP
70 h
t
t
t
DH
CLH
CH
All information provided in this document is subject to legal disclaimers.
command
Rev. 01.03 — 16 March 2010
[1]
Min
2 × T
-
-
-
-
-
-
-
-
HCLK
LPC3220/30/40/50
t
t
WHR
t
CLR
IR
16/32-bit ARM microcontrollers
Typ
-
6
0
2
0
10
0
2
0
t
CEA
data
status
t
REA
Max
256 × T
-
-
-
-
-
-
-
-
002aae446
© NXP B.V. 2010. All rights reserved.
t
t
HCLK
COH
RHOH
t
RHZ
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
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