LPC3230FET296,551 NXP Semiconductors, LPC3230FET296,551 Datasheet - Page 56

IC ARM9 MCU 256K 296-TFBGA

LPC3230FET296,551

Manufacturer Part Number
LPC3230FET296,551
Description
IC ARM9 MCU 256K 296-TFBGA
Manufacturer
NXP Semiconductors
Series
LPC32x0r
Datasheet

Specifications of LPC3230FET296,551

Core Processor
ARM9
Core Size
16/32-Bit
Speed
266MHz
Connectivity
EBI/EMI, I²C, IrDA, Microwire, SPI, SSI, SSP, UART/USART, USB OTG
Peripherals
DMA, I²S, LCD, Motor Control PWM, PWM, WDT
Number Of I /o
51
Program Memory Type
ROMless
Ram Size
256K x 8
Voltage - Supply (vcc/vdd)
0.9 V ~ 3.6 V
Data Converters
A/D 3x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
296-TFBGA
Processor Series
LPC32
Core
ARM926EJ-S
Data Bus Width
32 bit
Data Ram Size
256 KB
Interface Type
I2C, I2S, UART, USB
Maximum Clock Frequency
20 MHz
Number Of Programmable I/os
51
Number Of Timers
6
Operating Supply Voltage
2.7 V to 3.6 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
MDK-ARM, RL-ARM, ULINK2
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 8 Channel
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-
Lead Free Status / Rohs Status
 Details
Other names
568-4531
935287119551

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
LPC3230FET296,551
Manufacturer:
NXP Semiconductors
Quantity:
10 000
NXP Semiconductors
Table 12.
C
[1]
[2]
[3]
[4]
[5]
[6]
LPC3220_30_40_50_1
Product data sheet
Symbol
t
t
t
t
t
t
WELWEH
BLSLBLSH
WEHANV
WEHDNV
BLSHANV
BLSHDNV
Fig 7.
L
= 25 pF, T
T
Refer to the LPC32x0 user manual EMCStaticWaitOen0-3 register for the programming of WAITOEN value.
Refer to the LPC32x0 user manual EMCStaticWaitRd0-3 register for the programming of WAITRD value.
Refer to the LPC32x0 user manual EMCStaticWaitWen0-3 register for the programming of WAITWEN value.
Refer to the LPC32x0 user manual EMCStaticWaitWr0-3 register for the programming of WAITWR value.
Earliest of CS HIGH, OE HIGH, address change to data invalid.
CLCL
= 1/HCLK
External memory read access
Dynamic characteristics: static external memory interface
Parameter
WE LOW to WE HIGH time
BLS LOW to BLS HIGH time
WE HIGH to address invalid time
WE HIGH to data invalid time
BLS HIGH to address invalid time
BLS HIGH to data invalid time
EMC_BLS[3:0]
amb
EMC_CS[3:0]
EMC_D[31:0]
EMC_A[23:0]
= 20
EMC_OE
°
C, V
DD(EMC)
t
t
BLSLAV
OELAV
= 1.8 V, 2.5 V, or 3.3 V.
All information provided in this document is subject to legal disclaimers.
t
CSLAV
t
CSLBLSL
Rev. 01.03 — 16 March 2010
t
CSLOEL
Notes Min
[4][5]
[4][5]
t
t
BLSLBLSH
OELOEH
-
-
-
-
-
-
Typ
(WAITWR − WAITWEN + 1) × T
(WAITWR − WAITWEN + 1) × T
1 × T
1 × T
1 × T
1 × T
…continued
t
su(DQ)
CLCL
CLCL
CLCL
CLCL
t
CSHBLSH
t
LPC3220/30/40/50
CSHOEH
16/32-bit ARM microcontrollers
t
h(DQ)
t
BLSHANV
002aae402
t
OEHANV
CLCL
CLCL
© NXP B.V. 2010. All rights reserved.
Max
-
-
-
-
-
-
56 of 77
Unit
ns
ns
ns
ns
ns
ns

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