EP9315-CBZ Cirrus Logic Inc, EP9315-CBZ Datasheet - Page 314

• Manufacturer Part Number: EP9315-CBZ
• Description: IC ARM9 SOC ENH UNIV 352PBGA
• Manufacturer: Cirrus Logic Inc
• Series: EP9r

Specifications of EP9315-CBZ

• Core Size: 16/32-Bit
• Core Processor: ARM9
• Speed: 200MHz
• Connectivity: EBI/EMI, EIDE, Ethernet, I²C, IrDA, Keypad/Touchscreen, PCMCIA, SPI, UART/USART, USB
• Peripherals: AC'97, DMA, I&sup2:S, LCD, LED, MaverickKey, POR, PWM, WDT
• Number Of I /o: 16
• Program Memory Type: ROMless
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 1.65 V ~ 3.6 V
• Data Converters: A/D 8x12b
• Oscillator Type: External
• Operating Temperature: 0°C ~ 70°C
• Package / Case: 352-BGA
• Controller Family/series: (ARM9)
• No. Of I/o's: 16
• Cpu Speed: 200MHz
• No. Of Timers: 5
• Digital Ic Case Style: BGA
• Supply Voltage Range: 1.65V To 1.94V, 3V To 3.6V
• Embedded Interface Type: SPI
• Rohs Compliant: Yes
• Processor Series: EP93xx
• Core: ARM920T
• Data Bus Width: 32 bit
• 3rd Party Development Tools: MDK-ARM, RL-ARM, ULINK2
• Development Tools By Supplier: EDB9315A-Z
• Case: BGA
• Dc: 06+
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: 598-1144 - KIT DEVELOPMENT EP9315 ARM9
• Eeprom Size: -
• Program Memory Size: -
• Lead Free Status / Rohs Status: Details
• Other names: 598-1139

9
9-12
9.1.4.11.1 Steps for Reading From the PHY Registers.
9.1.4.11.2 Steps for Writing To the PHY Registers.
9.1.4.11.3 Steps for PHY Auto-negotiation
1/10/100 Mbps Ethernet LAN Controller
EP93xx User’s Guide
most PHYs require a preamble for access to the PHY's registers. However, to be safe, check
PHY's data sheet to determine if a preamble is needed to read/write PHY registers.
Note: Steps 1, 2, and 7 are not required if the PHY doesn't need a preamble for access to the
Note: Steps 1, 2, and 7 are not required if the PHY doesn't need a preamble for access to the
1. Read the value from the SelfCtl Register.
2. Since most PHYs need a Preamble for the MAC to read/write the PHY registers, you
3. Ensure that the PHY is not busy by polling the MIIStatus_Busy Bit in MIIStatus register.
4. Issue the command to read the register within the PHY.
5. Wait until the read command is completed. Determine this by polling the MIIStatus_Busy
6. Get the PHY data from the MII Data register.
7. Restore the old value to SelfCtl register.
1. Read the value from SelfCtl register.
2. Since most PHYs need a Preamble for the MAC to read/write the PHY registers, you
3. Ensure that the PHY is not busy by polling the MIIStatus_Busy bit in MIIStatus register.
4. Put the PHY data into the PHY Data register
5. Issue the write command to write data to the register within the PHY
6. Wait until the write command is completed. Determine this by polling the MIIStatus_Busy
7. Restore the old value to SelfCtl register.
1. Write to the Auto-Negotiation Advertisement register (0x04). Set it in accordance with
2. Write to Basic Mode Control Register (0x00), to enable and restart Auto-Negotiation.
3. Poll bit Auto_Neg_Complete in the BMSR register in the PHY until the Auto-Negotiation
IEEE_802.3 standard, and advertise 100/10M full/half duplex available.
may need to clear the PreambleSuppress bit.
bit in MIIStatus register.
may need to clear the PreambleSuppress bit.
Bit in MIIStatus Register.
is complete.
PHY's registers.
PHY's registers.
Copyright 2007 Cirrus Logic
DS785UM1