EP9315-CBZ Cirrus Logic Inc, EP9315-CBZ Datasheet - Page 621
EP9315-CBZ
Manufacturer Part Number
EP9315-CBZ
Description
IC ARM9 SOC ENH UNIV 352PBGA
Manufacturer
Cirrus Logic Inc
Series
EP9r
Specifications of EP9315-CBZ
Core Size
16/32-Bit
Core Processor
ARM9
Speed
200MHz
Connectivity
EBI/EMI, EIDE, Ethernet, I²C, IrDA, Keypad/Touchscreen, PCMCIA, SPI, UART/USART, USB
Peripherals
AC'97, DMA, I²:S, LCD, LED, MaverickKey, POR, PWM, WDT
Number Of I /o
16
Program Memory Type
ROMless
Ram Size
32K x 8
Voltage - Supply (vcc/vdd)
1.65 V ~ 3.6 V
Data Converters
A/D 8x12b
Oscillator Type
External
Operating Temperature
0°C ~ 70°C
Package / Case
352-BGA
Controller Family/series
(ARM9)
No. Of I/o's
16
Cpu Speed
200MHz
No. Of Timers
5
Digital Ic Case Style
BGA
Supply Voltage Range
1.65V To 1.94V, 3V To 3.6V
Embedded Interface Type
SPI
Rohs Compliant
Yes
Processor Series
EP93xx
Core
ARM920T
Data Bus Width
32 bit
3rd Party Development Tools
MDK-ARM, RL-ARM, ULINK2
Development Tools By Supplier
EDB9315A-Z
Case
BGA
Dc
06+
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
598-1144 - KIT DEVELOPMENT EP9315 ARM9
Eeprom Size
-
Program Memory Size
-
Lead Free Status / Rohs Status
Details
Other names
598-1139
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Part Number:
EP9315-CBZ
Manufacturer:
CIRRUS
Quantity:
20 000
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IrAdrMatchVal
DS785UM1
31
15
Address:
Default:
Definition:
30
14
29
13
28
12
TXP:
RXE:
TXE:
TUS:
BRD:
0:
0x808B_0008 - Read/Write
0x0000_0000
IrDA Address Match Value Register contains the 8 bit address match value
field which is used by the receiver to selectively store only the data within the
receive frames which have the same address. For incoming frames which
have the same address value as the AMV field, the frame’s address, control
and data is stored in the receive buffer. For those that do not match, the
remainder of the frame is ignored and the receive logic searches for the
beginning of the next frame. This register is used for both MIR and FIR. The
AME bit in IrCtrl must be set to enable this function. Frames containing an
RSVD
27
11
26
10
Copyright 2007 Cirrus Logic
25
9
Transmit Polarity Control.
0 - Encoded data is not inverted before being passed to
the pins.
1 - Encoded data is inverted before being passed to the
pins.
Receive Enable.
0 - Ir receive logic is disabled and clocks are stopped.
1 - Ir receive logic is enabled.
Transmit Enable.
0 - Transmit logic is disabled and clocks are stopped.
1 - Transmit logic is enabled.
Transmit buffer Underrun Select.
0 - Transmit buffer underrun causes CRC, stop flag, and
SIP to be transmitted.
1 - Transmit buffer underrun causes an abort to be
transmitted.
MIR Bit rate select.
0 - MIR data rate is 0.576 Mbit/s.
1 - MIR data rate is 1.152 Mbit/s.
Must be written to “0”.
24
8
RSVD
23
7
22
6
21
5
20
4
AMV
19
3
EP93xx User’s Guide
18
2
17
1
17-25
IrDA
16
0
17
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