AT91M55800A-33CJ Atmel, AT91M55800A-33CJ Datasheet - Page 164

• Manufacturer Part Number: AT91M55800A-33CJ
• Description: IC ARM MCU 16BIT 176BGA
• Manufacturer: Atmel
• Series: AT91SAMr

Specifications of AT91M55800A-33CJ

• Core Processor: ARM7
• Core Size: 16/32-Bit
• Speed: 33MHz
• Connectivity: EBI/EMI, SPI, UART/USART
• Peripherals: POR, WDT
• Number Of I /o: 58
• Program Memory Type: ROMless
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 3.6 V
• Data Converters: A/D 8x10b; D/A 2x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 176-LFBGA
• Processor Series: AT91Mx
• Core: ARM7TDMI
• Data Bus Width: 32 bit
• Data Ram Size: 8 KB
• Interface Type: EBI, SPI, USART
• Maximum Clock Frequency: 33 MHz
• Number Of Programmable I/os: 58
• Number Of Timers: 10 bit
• Operating Supply Voltage: 3 V to 3.6 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: JTRACE-ARM-2M, MDK-ARM, RL-ARM, ULINK2
• Development Tools By Supplier: AT91EB55
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 8 Channel
• On-chip Dac: 8 bit, 2 Channel
• Cpu Family: AT91
• Device Core: ARM7TDMI
• Device Core Size: 32b
• Frequency (max): 33MHz
• Program Memory Size: Not Required
• Total Internal Ram Size: 8KB
• # I/os (max): 58
• Number Of Timers - General Purpose: 6
• Operating Supply Voltage (typ): 3.3V
• Operating Supply Voltage (max): 3.6V
• Operating Supply Voltage (min): 2.7V
• Instruction Set Architecture: RISC
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 176
• Package Type: BGA
• For Use With: AT91EB55 - KIT EVAL FOR ARM AT91M55800A
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Program Memory Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

19.1
Table 19-1.
Notes:
164
Channel Signals
XC0, XC1, XC2
TIOA
TIOB
INT
SYNC
Block 0 Signals
TCLK0, TCLK1, TCLK2
TIOA0
TIOB0
TIOA1
TIOB1
TIOA2
TIOB2
Block 1 Signals
TCLK3, TCLK4, TCLK5
TIOA3
TIOB3
TIOA4
TIOB4
TIOA5
TIOB5
Signal Name Description
1. After a hardware reset, the TC clock is disabled by default
2. After a hardware reset, the Timer Counter block pins are controlled by the PIO Controller. They must be configured to be
AT91M5880A
52.). The user must configure the Power Management Controller before any access to the User Interface of the TC.
controlled by the peripheral before being used.
Signal Name Description
Description
External Clock Inputs
Capture Mode: General-purpose input
Waveform Mode: General-purpose output
Capture Mode: General-purpose input
Waveform Mode: General-purpose input/output
Interrupt signal output
Synchronization input signal
Description
External Clock Inputs for Channels 0, 1, 2
TIOA signal for Channel 0
TIOB signal for Channel 0
TIOA signal for Channel 1
TIOB signal for Channel 1
TIOA signal for Channel 2
TIOB signal for Channel 2
Description
External Clock Inputs for Channels 3, 4, 5
TIOA signal for Channel 3
TIOB signal for Channel 3
TIOA signal for Channel 4
TIOB signal for Channel 4
TIOA signal for Channel 5
TIOB signal for Channel 5
(See “APMC: Advanced Power Management Controller” on page
1745F–ATARM–06-Sep-07