AT91M55800A-33CJ Atmel, AT91M55800A-33CJ Datasheet - Page 19

IC ARM MCU 16BIT 176BGA

AT91M55800A-33CJ

Manufacturer Part Number
AT91M55800A-33CJ
Description
IC ARM MCU 16BIT 176BGA
Manufacturer
Atmel
Series
AT91SAMr
Datasheets

Specifications of AT91M55800A-33CJ

Core Processor
ARM7
Core Size
16/32-Bit
Speed
33MHz
Connectivity
EBI/EMI, SPI, UART/USART
Peripherals
POR, WDT
Number Of I /o
58
Program Memory Type
ROMless
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 3.6 V
Data Converters
A/D 8x10b; D/A 2x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
176-LFBGA
Processor Series
AT91Mx
Core
ARM7TDMI
Data Bus Width
32 bit
Data Ram Size
8 KB
Interface Type
EBI, SPI, USART
Maximum Clock Frequency
33 MHz
Number Of Programmable I/os
58
Number Of Timers
10 bit
Operating Supply Voltage
3 V to 3.6 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
JTRACE-ARM-2M, MDK-ARM, RL-ARM, ULINK2
Development Tools By Supplier
AT91EB55
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 8 Channel
On-chip Dac
8 bit, 2 Channel
Cpu Family
AT91
Device Core
ARM7TDMI
Device Core Size
32b
Frequency (max)
33MHz
Program Memory Size
Not Required
Total Internal Ram Size
8KB
# I/os (max)
58
Number Of Timers - General Purpose
6
Operating Supply Voltage (typ)
3.3V
Operating Supply Voltage (max)
3.6V
Operating Supply Voltage (min)
2.7V
Instruction Set Architecture
RISC
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
176
Package Type
BGA
For Use With
AT91EB55 - KIT EVAL FOR ARM AT91M55800A
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Program Memory Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

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8.4
8.4.1
8.4.2
8.4.3
8.4.4
1745F–ATARM–06-Sep-07
System Peripherals
APMC: Advanced Power Management Controller
RTC: Real-time Clock
AIC: Advanced Interrupt Controller
PIO: Parallel I/O Controller
Most importantly, the PDC removes the processor interrupt handling overhead and significantly
reduces the number of clock cycles required for a data transfer. It can transfer up to 64K contig-
uous bytes. As a result, the performance of the microcontroller is increased and the power
consumption reduced.
The AT91M55800A Advanced Power Management Controller allows optimization of power con-
sumption. The APMC enables/disables the clock inputs of most of the peripherals and the ARM
Core. Moreover, the main oscillator, the PLL and the analog peripherals can be put in standby
mode allowing minimum power consumption to be obtained. The APMC provides the following
operating modes:
The AT91M55800A features a Real-time Clock (RTC) peripheral that is designed for very low
power consumption. It combines a complete time-of-day clock with alarm and a two-hundred
year Gregorian calendar, complemented by a programmable periodic interrupt.
The time and calendar values are coded in Binary-Coded Decimal (BCD) format. The time for-
mat can be 24-hour mode or 12-hour mode with an AM/PM indicator.
Updating time and calendar fields and configuring the alarm fields is performed by a parallel cap-
ture on the 32-bit data bus. An entry control is performed to avoid loading registers with
incompatible BCD format data or with an incompatible date according to the current month/
year/century.
The AIC has an 8-level priority, individually maskable, vectored interrupt controller, and drives
the NIRQ and NFIQ pins of the ARM7TDMI from:
The AIC is largely programmable offering maximum flexibility, and its vectoring features reduce
the real-time overhead in handling interrupts.
The AIC also features a spurious vector, which reduces Spurious Interrupt handling to a mini-
mum, and a protect mode that facilitates the debug capabilities.
The AT91M55800A has 58 programmable I/O lines. 13 pins are dedicated as general-purpose
I/O pins. The other I/O lines are multiplexed with an external signal of a peripheral to optimize
the use of available package pins. The PIO lines are controlled by two separate and identical
• Normal: clock generator provides clock to the entire chip except the RTC.
• Wait mode: ARM Core clock deactivated
• Slow Clock mode: clock generator deactivated, master clock 32 kHz
• Standby mode: RTC active, all other clocks disabled
• Power down: RTC active, supply on the rest of the circuit deactivated
• The external fast interrupt line (FIQ)
• The six external interrupt request lines (IRQ0 - IRQ5)
• The interrupt signals from the on-chip peripherals.
AT91M5880A
19

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