AT91M55800A-33CJ Atmel, AT91M55800A-33CJ Datasheet - Page 60

IC ARM MCU 16BIT 176BGA

AT91M55800A-33CJ

Manufacturer Part Number
AT91M55800A-33CJ
Description
IC ARM MCU 16BIT 176BGA
Manufacturer
Atmel
Series
AT91SAMr
Datasheets

Specifications of AT91M55800A-33CJ

Core Processor
ARM7
Core Size
16/32-Bit
Speed
33MHz
Connectivity
EBI/EMI, SPI, UART/USART
Peripherals
POR, WDT
Number Of I /o
58
Program Memory Type
ROMless
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 3.6 V
Data Converters
A/D 8x10b; D/A 2x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
176-LFBGA
Processor Series
AT91Mx
Core
ARM7TDMI
Data Bus Width
32 bit
Data Ram Size
8 KB
Interface Type
EBI, SPI, USART
Maximum Clock Frequency
33 MHz
Number Of Programmable I/os
58
Number Of Timers
10 bit
Operating Supply Voltage
3 V to 3.6 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
JTRACE-ARM-2M, MDK-ARM, RL-ARM, ULINK2
Development Tools By Supplier
AT91EB55
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 8 Channel
On-chip Dac
8 bit, 2 Channel
Cpu Family
AT91
Device Core
ARM7TDMI
Device Core Size
32b
Frequency (max)
33MHz
Program Memory Size
Not Required
Total Internal Ram Size
8KB
# I/os (max)
58
Number Of Timers - General Purpose
6
Operating Supply Voltage (typ)
3.3V
Operating Supply Voltage (max)
3.6V
Operating Supply Voltage (min)
2.7V
Instruction Set Architecture
RISC
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
176
Package Type
BGA
For Use With
AT91EB55 - KIT EVAL FOR ARM AT91M55800A
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Program Memory Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

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Figure 12-7. Shut-down and Wake-up Features
12.7
60
Alarm
AT91M5880A
Power
Supply
Resistor
required by
some DC/DC
Converters
DC/DC Converter
SHD
To accommodate the different types of main power supply available, and different signals that
can command the shut-down of this device, tri-state, level 0 and level 1 are user-definable for
the Shut-down pin. The Wake-up pin can be configured as detected on the positive or negative
edge, and at high or low level. They are selected by the SHDALS and WKACKS fields in
APMC_PMR.
If the Shut-down feature is not used, the pin SHDN can be used as an Alarm Output Signal from
the RTC Alarm. The Alarm State corresponds to Shut-down, and the Acknowledge or Non-Alarm
State corresponds to Wake-up.
The alarm control logic is the same as that for Shut-down. The SHDALC command in
APMC_PCR (defined by the field SHDALS in APMC_PMR) and the WKACKS command in
APMC_PCR (defined by the field WKACKS field in APMC_PMR) control the SHDN pin.
The alarm can be positioned by an RTC Alarm and be acknowledged by a programmable edge
on the WAKEUP pin. The Backup Reset initializes the logic in Non-Alarm State.
Main Start Up
Battery
Backup
Shut-down
Jumper
Disable
+
-
VDDIO
VDDCORE
GND
VDDBU
NRSTBU
GNDBU
SHDN
WAKE-UP
AT91M55800
1745F–ATARM–06-Sep-07

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