AT90CAN128-15AZ Atmel, AT90CAN128-15AZ Datasheet - Page 199

• Manufacturer Part Number: AT90CAN128-15AZ
• Description: MCU AVR 128K FLASH 15MHZ 64TQFP
• Manufacturer: Atmel
• Series: AVR® 90CANr

Specifications of AT90CAN128-15AZ

• Package / Case: 64-TQFP, 64-VQFP
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Operating Temperature: -40°C ~ 125°C
• Speed: 16MHz
• Number Of I /o: 53
• Eeprom Size: 4K x 8
• Core Processor: AVR
• Program Memory Type: FLASH
• Ram Size: 4K x 8
• Program Memory Size: 128KB (128K x 8)
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Connectivity: CAN, I²C, SPI, UART/USART
• Core Size: 8-Bit
• Processor Series: AT90CANx
• Core: AVR8
• Data Bus Width: 8 bit
• Data Ram Size: 4 KB
• Interface Type: CAN, SPI, UART
• Maximum Clock Frequency: 16 MHz
• Number Of Programmable I/os: 53
• Number Of Timers: 4
• Maximum Operating Temperature: + 125 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: EWAVR, EWAVR-BL
• Development Tools By Supplier: ATAVRDRAGON, ATSTK500, ATSTK600, ATAVRISP2, ATDVK90CAN1, ATADAPCAN01
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 8 Channel
• Cpu Family: 90C
• Device Core: AVR
• Device Core Size: 8b
• Frequency (max): 16MHz
• Total Internal Ram Size: 4KB
• # I/os (max): 53
• Number Of Timers - General Purpose: 4
• Operating Supply Voltage (typ): 3.3/5V
• Operating Supply Voltage (max): 5.5V
• Operating Supply Voltage (min): 2.7V
• Instruction Set Architecture: RISC
• Operating Temp Range: -40C to 125C
• Operating Temperature Classification: Automotive
• Mounting: Surface Mount
• Pin Count: 64
• Package Type: TQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

17.11.9
17.11.10 USART1 Baud Rate Registers – UBRR1L and UBRR1H
7679H–CAN–08/08
USART0 Baud Rate Registers – UBRR0L and UBRR0H
• Bit 2:1 – UCSZn1:0: Character Size
The UCSZn1:0 bits combined with the UCSZn2 bit in UCSRnB sets the number of data bits
(Character SiZe) in a frame the Receiver and Transmitter use.
Table 17-7.
• Bit 0 – UCPOLn: Clock Polarity
This bit is used for synchronous mode only. Write this bit to zero when asynchronous mode is
used. The UCPOLn bit sets the relationship between data output change and data input sample,
and the synchronous clock (XCKn).
Table 17-8.
Bit
Read/Write
Initial Value
Bit
Read/Write
Initial Value
UCPOLn
UCSZn2
0
1
0
0
0
0
1
1
1
1
UCSZn Bits Settings
UCPOLn Bit Settings
Transmitted Data Changed
(Output of TxDn Pin)
Rising XCK Edge
Falling XCK Edge
R/W
R/W
15
15
R
R
–
7
0
0
–
7
0
0
R/W
R/W
14
14
R
R
–
6
0
0
–
6
0
0
UCSZn1
0
0
1
1
0
0
1
1
R/W
R/W
13
13
R
R
–
5
0
0
–
5
0
0
R/W
R/W
12
12
–
4
R
0
0
–
4
R
0
0
UBRR0[7:0]
UBRR1[7:0]
UCSZn0
R/W
R/W
R/W
R/W
11
11
3
0
0
3
0
0
0
1
0
1
0
1
0
1
R/W
R/W
R/W
R/W
10
10
UBRR0[11:8]
UBRR1[11:8]
2
0
0
2
0
0
Received Data Sampled
(Input on RxDn Pin)
Falling XCK Edge
Rising XCK Edge
AT90CAN32/64/128
Character Size
5-bit
6-bit
7-bit
8-bit
Reserved
Reserved
Reserved
9-bit
R/W
R/W
R/W
R/W
9
1
0
0
9
1
0
0
R/W
R/W
R/W
R/W
8
0
0
0
8
0
0
0
UBRR0H
UBRR1H
UBRR0L
UBRR1L
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