AT90CAN128-15AZ Atmel, AT90CAN128-15AZ Datasheet - Page 78

MCU AVR 128K FLASH 15MHZ 64TQFP

AT90CAN128-15AZ

Manufacturer Part Number
AT90CAN128-15AZ
Description
MCU AVR 128K FLASH 15MHZ 64TQFP
Manufacturer
Atmel
Series
AVR® 90CANr
Datasheets

Specifications of AT90CAN128-15AZ

Package / Case
64-TQFP, 64-VQFP
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Operating Temperature
-40°C ~ 125°C
Speed
16MHz
Number Of I /o
53
Eeprom Size
4K x 8
Core Processor
AVR
Program Memory Type
FLASH
Ram Size
4K x 8
Program Memory Size
128KB (128K x 8)
Data Converters
A/D 8x10b
Oscillator Type
Internal
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Connectivity
CAN, I²C, SPI, UART/USART
Core Size
8-Bit
Processor Series
AT90CANx
Core
AVR8
Data Bus Width
8 bit
Data Ram Size
4 KB
Interface Type
CAN, SPI, UART
Maximum Clock Frequency
16 MHz
Number Of Programmable I/os
53
Number Of Timers
4
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWAVR, EWAVR-BL
Development Tools By Supplier
ATAVRDRAGON, ATSTK500, ATSTK600, ATAVRISP2, ATDVK90CAN1, ATADAPCAN01
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 8 Channel
Cpu Family
90C
Device Core
AVR
Device Core Size
8b
Frequency (max)
16MHz
Total Internal Ram Size
4KB
# I/os (max)
53
Number Of Timers - General Purpose
4
Operating Supply Voltage (typ)
3.3/5V
Operating Supply Voltage (max)
5.5V
Operating Supply Voltage (min)
2.7V
Instruction Set Architecture
RISC
Operating Temp Range
-40C to 125C
Operating Temperature Classification
Automotive
Mounting
Surface Mount
Pin Count
64
Package Type
TQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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9.3.4
78
AT90CAN32/64/128
Alternate Functions of Port C
Table 9-8.
The Port C has an alternate function as the address high byte for the External Memory Interface.
The Port C pins with alternate functions are shown in
Table 9-9.
The alternate pin configuration is as follows:
• A15/CLKO – Port C, Bit 7
A15, External memory interface address 15.
CLKO, Divided System Clock: The divided system clock can be output on the PC7 pin. The
divided system clock will be output if the CKOUT Fuse is programmed, regardless of the
PORTC7 and DDC7 settings. It will also be output during reset.
Signal Name
PUOE
PUOV
DDOE
DDOV
PVOE
PVOV
PTOE
DIEOE
DIEOV
DI
AIO
Port Pin
PC7
PC6
PC5
PC4
PC3
PC2
PC1
PC0
Overriding Signals for Alternate Functions in PB3..PB0
Port C Pins Alternate Functions
PB3/MISO
SPE • MSTR
PORTB3 • PUD
SPE • MSTR
0
SPI SLAVE
OUTPUT
0
0
0
SPI MASTER
INPUT
SPE • MSTR
Alternate Function
A15/CLKO (External memory interface address 15 or Divided System
Clock)
A14 (External memory interface address 14)
A13 (External memory interface address 13)
A12 (External memory interface address 12)
A11 (External memory interface address 11)
A10 (External memory interface address 10)
A9 (External memory interface address 9)
A8 (External memory interface address 8)
PB2/MOSI
SPE • MSTR
PORTB2 • PUD
SPE • MSTR
0
SPE • MSTR
SPI MASTER
OUTPUT
0
0
0
SPI SLAVE
INPUT • RESET
Table
PB1/SCK
SPE • MSTR
PORTB1 • PUD
SPE • MSTR
0
SPE • MSTR
SCK OUTPUT
0
0
0
SCK INPUT
9-9.
PB0/SS
SPE • MSTR
PORTB0 • PUD
SPE • MSTR
0
0
0
0
0
0
SPI SS
7679H–CAN–08/08

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