AT90CAN128-15AZ Atmel, AT90CAN128-15AZ Datasheet - Page 75

• Manufacturer Part Number: AT90CAN128-15AZ
• Description: MCU AVR 128K FLASH 15MHZ 64TQFP
• Manufacturer: Atmel
• Series: AVR® 90CANr

Specifications of AT90CAN128-15AZ

• Package / Case: 64-TQFP, 64-VQFP
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Operating Temperature: -40°C ~ 125°C
• Speed: 16MHz
• Number Of I /o: 53
• Eeprom Size: 4K x 8
• Core Processor: AVR
• Program Memory Type: FLASH
• Ram Size: 4K x 8
• Program Memory Size: 128KB (128K x 8)
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Connectivity: CAN, I²C, SPI, UART/USART
• Core Size: 8-Bit
• Processor Series: AT90CANx
• Core: AVR8
• Data Bus Width: 8 bit
• Data Ram Size: 4 KB
• Interface Type: CAN, SPI, UART
• Maximum Clock Frequency: 16 MHz
• Number Of Programmable I/os: 53
• Number Of Timers: 4
• Maximum Operating Temperature: + 125 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: EWAVR, EWAVR-BL
• Development Tools By Supplier: ATAVRDRAGON, ATSTK500, ATSTK600, ATAVRISP2, ATDVK90CAN1, ATADAPCAN01
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 8 Channel
• Cpu Family: 90C
• Device Core: AVR
• Device Core Size: 8b
• Frequency (max): 16MHz
• Total Internal Ram Size: 4KB
• # I/os (max): 53
• Number Of Timers - General Purpose: 4
• Operating Supply Voltage (typ): 3.3/5V
• Operating Supply Voltage (max): 5.5V
• Operating Supply Voltage (min): 2.7V
• Instruction Set Architecture: RISC
• Operating Temp Range: -40C to 125C
• Operating Temperature Classification: Automotive
• Mounting: Surface Mount
• Pin Count: 64
• Package Type: TQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

7679H–CAN–08/08
Table 9-4
in
Table 9-4.
Note:
Table 9-5.
Note:
Signal Name
PUOE
PUOV
DDOE
DDOV
PVOE
PVOV
PTOE
DIEOE
DIEOV
DI
AIO
Signal Name
PUOE
PUOV
DDOE
DDOV
PVOE
PVOV
PTOE
DIEOE
DIEOV
DI
AIO
Figure 9-5 on page
1. ADA is short for ADdress Active and represents the time when address is output. See
1. ADA is short for ADdress Active and represents the time when address is output. See
and
nal Memory Interface” on page 27
nal Memory Interface” on page 27
Table 9-5
Overriding Signals for Alternate Functions in PA7..PA4
Overriding Signals for Alternate Functions in PA3..PA0
PA7/AD7
PA3/AD3
SRE •
(ADA
0
SRE
WR + ADA
SRE
A3 • ADA
OUTPUT • WR
0
0
0
D3 INPUT
–
SRE •
(ADA
0
SRE
WR + ADA
SRE
A7 • ADA
OUTPUT • WR
0
0
0
D7 INPUT
–
72.
(1)
(1)
relates the alternate functions of Port A to the overriding signals shown
+ WR)
+ WR)
(1)
(1)
+ D7
+ D3
PA2/AD2
SRE •
(ADA
0
SRE
WR + ADA
SRE
A2 • ADA
OUTPUT • WR
0
0
0
D2 INPUT
–
PA6/AD6
SRE •
(ADA
0
SRE
WR + ADA
SRE
A6 • ADA
OUTPUT • WR
0
0
0
D6 INPUT
–
for details.
for details.
(1)
(1)
+ WR)
+ WR)
(1)
(1)
+ D6
+ D2
PA5/AD5
SRE •
(ADA
0
SRE
WR + ADA
SRE
A5 • ADA
OUTPUT • WR
0
0
0
D5 INPUT
–
PA1/AD1
SRE •
(ADA
0
SRE
WR + ADA
SRE
A1 • ADA
OUTPUT • WR
0
0
0
D1 INPUT
–
AT90CAN32/64/128
(1)
(1)
+ WR)
+ WR)
(1)
(1)
+ D1
+ D5
PA4/AD4
SRE •
(ADA
0
SRE
WR + ADA
SRE
A4 • ADA
OUTPUT • WR
0
0
0
D4 INPUT
–
PA0/AD0
SRE •
(ADA
0
SRE
WR + ADA
SRE
A0 • ADA
OUTPUT • WR
0
0
0
D0 INPUT
–
(1)
(1)
+ WR)
+ WR)
(1)
(1)
+ D4
+ D0
“Exter-
“Exter-
75