MC9S12C64CFUE Freescale Semiconductor, MC9S12C64CFUE Datasheet - Page 242

• Manufacturer Part Number: MC9S12C64CFUE
• Description: IC MCU 64K FLASH 4K RAM 80-QFP
• Manufacturer: Freescale Semiconductor
• Series: HCS12r

Specifications of MC9S12C64CFUE

• Core Processor: HCS12
• Core Size: 16-Bit
• Speed: 25MHz
• Connectivity: CAN, EBI/EMI, SCI, SPI
• Peripherals: POR, PWM, WDT
• Number Of I /o: 60
• Program Memory Size: 64KB (64K x 8)
• Program Memory Type: FLASH
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 2.35 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 80-QFP
• Processor Series: S12C
• Core: HCS12
• Data Bus Width: 16 bit
• Data Ram Size: 4 KB
• Interface Type: CAN/SCI/SPI
• Maximum Clock Frequency: 25 MHz
• Number Of Programmable I/os: 60
• Number Of Timers: 8
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: EWHCS12
• Development Tools By Supplier: M68EVB912C32EE
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 8-ch x 10-bit
• Package: 80PQFP
• Family Name: HCS12
• Maximum Speed: 25 MHz
• Operating Supply Voltage: 2.5|5 V
• Height: 2.4 mm
• Length: 14 mm
• Supply Voltage (max): 2.75 V, 5.5 V
• Supply Voltage (min): 2.35 V, 2.97 V
• Width: 14 mm
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

Chapter 8 Analog-to-Digital Converter (ATD10B8C) Block Description
8.3.2.11
Read: Anytime
Write: Anytime
242
Module Base + 0x000D
IEN[7:0]
Reset
Field
7–0
W
R
IEN7
ATD Digital Input Enable on channel x (x = 7, 6, 5, 4, 3, 2, 1, 0) — This bit controls the digital input buffer from
the analog input pin (ANx) to PTADx data register.
0 Disable digital input buffer to PTADx
1 Enable digital input buffer to PTADx.
Note: Setting this bit will enable the corresponding digital input buffer continuously. If this bit is set while
ATD Input Enable Register (ATDDIEN)
0
7
simultaneously using it as an analog port, there is potentially increased power consumption because the
digital input buffer maybe in the linear region.
IEN6
0
6
Figure 8-13. ATD Input Enable Register (ATDDIEN)
Table 8-17. ATDDIEN Field Descriptions
MC9S12C-Family / MC9S12GC-Family
IEN5
0
5
Rev 01.24
IEN4
0
4
Description
IEN3
0
3
IEN2
0
2
Freescale Semiconductor
IEN1
0
1
IEN0
0
0