MC9S12C64CFUE Freescale Semiconductor, MC9S12C64CFUE Datasheet - Page 358

IC MCU 64K FLASH 4K RAM 80-QFP

MC9S12C64CFUE

Manufacturer Part Number
MC9S12C64CFUE
Description
IC MCU 64K FLASH 4K RAM 80-QFP
Manufacturer
Freescale Semiconductor
Series
HCS12r
Datasheets

Specifications of MC9S12C64CFUE

Core Processor
HCS12
Core Size
16-Bit
Speed
25MHz
Connectivity
CAN, EBI/EMI, SCI, SPI
Peripherals
POR, PWM, WDT
Number Of I /o
60
Program Memory Size
64KB (64K x 8)
Program Memory Type
FLASH
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
2.35 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
80-QFP
Processor Series
S12C
Core
HCS12
Data Bus Width
16 bit
Data Ram Size
4 KB
Interface Type
CAN/SCI/SPI
Maximum Clock Frequency
25 MHz
Number Of Programmable I/os
60
Number Of Timers
8
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWHCS12
Development Tools By Supplier
M68EVB912C32EE
Minimum Operating Temperature
- 40 C
On-chip Adc
8-ch x 10-bit
Package
80PQFP
Family Name
HCS12
Maximum Speed
25 MHz
Operating Supply Voltage
2.5|5 V
Height
2.4 mm
Length
14 mm
Supply Voltage (max)
2.75 V, 5.5 V
Supply Voltage (min)
2.35 V, 2.97 V
Width
14 mm
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

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Chapter 12 Pulse-Width Modulator (PWM8B6CV1) Block Description
Read: anytime
Write: anytime
12.3.2.6
The PWMCTL register provides for various control of the PWM module.
358
Module Base + 0x0004
Reset
CAE5
CAE4
CAE3
CAE2
CAE1
CAE0
Field
5
4
3
2
1
0
W
R
Center Aligned Output Mode on Channel 5
0 Channel 5 operates in left aligned output mode.
1 Channel 5 operates in center aligned output mode.
Center Aligned Output Mode on Channel 4
0 Channel 4 operates in left aligned output mode.
1 Channel 4 operates in center aligned output mode.
Center Aligned Output Mode on Channel 3
1 Channel 3 operates in left aligned output mode.
1 Channel 3 operates in center aligned output mode.
Center Aligned Output Mode on Channel 2
0 Channel 2 operates in left aligned output mode.
1 Channel 2 operates in center aligned output mode.
Center Aligned Output Mode on Channel 1
0 Channel 1 operates in left aligned output mode.
1 Channel 1 operates in center aligned output mode.
Center Aligned Output Mode on Channel 0
0 Channel 0 operates in left aligned output mode.
1 Channel 0 operates in center aligned output mode.
PWM Control Register (PWMCTL)
0
0
7
Write these bits only when the corresponding channel is disabled.
= Unimplemented or Reserved
Figure 12-7. PWM Center Align Enable Register (PWMCAE)
0
0
6
Table 12-8. PWMCAE Field Descriptions
CAE5
MC9S12C-Family / MC9S12GC-Family
0
5
CAE4
Rev 01.24
NOTE
0
4
Description
CAE3
0
3
CAE2
0
2
Freescale Semiconductor
CAE1
0
1
CAE0
0
0

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