MC68HC16Z1CAG25 Freescale Semiconductor, MC68HC16Z1CAG25 Datasheet - Page 480

• Manufacturer Part Number: MC68HC16Z1CAG25
• Description: IC MCU 16BIT 25MHZ 144-LQFP
• Manufacturer: Freescale Semiconductor
• Series: HC16r

Specifications of MC68HC16Z1CAG25

• Core Processor: CPU16
• Core Size: 16-Bit
• Speed: 25MHz
• Connectivity: EBI/EMI, SCI, SPI
• Peripherals: POR, PWM, WDT
• Number Of I /o: 16
• Program Memory Type: ROMless
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 144-LQFP
• Cpu Family: HC16
• Device Core Size: 16b
• Frequency (max): 25MHz
• Interface Type: SCI/SPI/UART
• Program Memory Size: Not Required
• Total Internal Ram Size: 1KB
• # I/os (max): 16
• Number Of Timers - General Purpose: 11
• Operating Supply Voltage (typ): 3.3/5V
• Operating Supply Voltage (max): 5.5V
• Operating Supply Voltage (min): 2.7V
• On-chip Adc: 8-chx10-bit
• Instruction Set Architecture: CISC
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 144
• Package Type: LQFP
• Controller Family/series: 68HC16
• No. Of I/o's: 16
• Ram Memory Size: 1KB
• Cpu Speed: 25MHz
• No. Of Timers: 2
• Embedded Interface Type: QSPI, SCI
• Rohs Compliant: Yes
• Processor Series: HC16Z
• Core: CPU16
• Data Bus Width: 16 bit
• Data Ram Size: 1 KB
• Maximum Clock Frequency: 25 MHz
• Number Of Programmable I/os: 16
• Number Of Timers: 11
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -
• Lead Free Status / Rohs Status: Compliant

again
TC_LOOP:
*****
STRING_IC1
STRING_IC2
STRING_IC3
STRING_OC2
STRING_PAOV
times!',07,0a,0d,00
*****
*
*
IC1_ROUTINE:
IC2_ROUTINE:
IC3_ROUTINE:
OC2_ROUTINE:
PAOV_ROUTINE:
min
E-28
EVEN
The STRINGS
Exceptions/Interrupts
ANDA
BEQ
LDAA
STD
LDAB
ANDB
BEQ
RTS
Note that every one of the GPT interrupt service routines clears
its flag bit at the end of the routine before the RTI instruction.
LDX
JSR
BCLR
RTI
LDX
JSR
BCLR
RTI
LDX
JSR
BCLR
RTI
LDX
JSR
BCLR
RTI
#$01
SEND_CH
#$00
SCDR
SCSR+1
#$80
TC_LOOP
DC.W
DC.W
DC.W
DC.W
DC.W
#STRING_IC1
SEND_STRING
TFLG1,#$01
#STRING_IC2
SEND_STRING
TFLG1,#$02
#STRING_IC3
SEND_STRING
TFLG1,#$04
#STRING_OC2
SEND_STRING
TFLG1,#$10
INITIALIZATION AND PROGRAMMING EXAMPLES
*****
Freescale Semiconductor, Inc.
For More Information On This Product,
'Input capture 1 caught a transition',0a,0d,00
'Input capture 2 caught a rising edge',0a,0d,00
'Input capture 3 caught a falling edge',0a,0d,00
0a,'Output compare 2 just toggled',0a,0d,00
0a,'Pulse Accum. has overflowed 10
Go to: www.freescale.com
*****
;check only the TDRE flag bit
;if TDR is not empty, go back to check it
;clear A to send a full word to SCDR ($FFC0E)
;transmit one ASCII character to the screen
;test the TC bit (transfer complete)
;continue to wait until TC is set
;finish sending out byte
;execute when IC1 senses a transition
;print the message
;clear the IC1 flag bit
;execute when IC2 senses a rising edge
;print the message
;clear the IC2 flag bit
;execute when IC3 senses a falling edge
;print the message
;clear the IC3 flag bit
;execute when OC2 does a toggle
;print the message
;clear the OC2 flag bit
;execute on Pulse Accumulator Counter overflow
;if PAI pin tied PWMA, bell approx every 5 sec
;if PAI pin tied PWMB, bell approx every 10
M68HC16 Z SERIES
USER’S MANUAL