MC68HC16Z1CAG25 Freescale Semiconductor, MC68HC16Z1CAG25 Datasheet - Page 55

• Manufacturer Part Number: MC68HC16Z1CAG25
• Description: IC MCU 16BIT 25MHZ 144-LQFP
• Manufacturer: Freescale Semiconductor
• Series: HC16r

Specifications of MC68HC16Z1CAG25

• Core Processor: CPU16
• Core Size: 16-Bit
• Speed: 25MHz
• Connectivity: EBI/EMI, SCI, SPI
• Peripherals: POR, PWM, WDT
• Number Of I /o: 16
• Program Memory Type: ROMless
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 144-LQFP
• Cpu Family: HC16
• Device Core Size: 16b
• Frequency (max): 25MHz
• Interface Type: SCI/SPI/UART
• Program Memory Size: Not Required
• Total Internal Ram Size: 1KB
• # I/os (max): 16
• Number Of Timers - General Purpose: 11
• Operating Supply Voltage (typ): 3.3/5V
• Operating Supply Voltage (max): 5.5V
• Operating Supply Voltage (min): 2.7V
• On-chip Adc: 8-chx10-bit
• Instruction Set Architecture: CISC
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 144
• Package Type: LQFP
• Controller Family/series: 68HC16
• No. Of I/o's: 16
• Ram Memory Size: 1KB
• Cpu Speed: 25MHz
• No. Of Timers: 2
• Embedded Interface Type: QSPI, SCI
• Rohs Compliant: Yes
• Processor Series: HC16Z
• Core: CPU16
• Data Bus Width: 16 bit
• Data Ram Size: 1 KB
• Maximum Clock Frequency: 25 MHz
• Number Of Programmable I/os: 16
• Number Of Timers: 11
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -
• Lead Free Status / Rohs Status: Compliant

M68HC16 Z SERIES
USER’S MANUAL
UNDEFINED
512 KBYTE
Figure 3-12 MC68HC16Z2/Z3 Combined Program and Data Space Map
512 KBYTE
NOTE:
1. THE ADDRESSES DISPLAYED IN THIS MEMORY MAP ARE THE FULL 24-BIT IMB ADDRESSES. THE CPU16
$080000
$FC0000
ADDRESS BUS IS 20 BITS WIDE, AND CPU16 ADDRESS LINE 19 DRIVES IMB ADDRESS LINES [23:20]. THE
BLOCK OF ADDRESSES FROM $080000 TO $F7FFFF MARKED AS UNDEFINED WILL NEVER APPEAR ON THE
IMB. MEMORY BANKS 0 TO 15 APPEAR FULLY CONTIGUOUS IN THE CPU16’S FLAT 20-BIT ADDRESS SPACE.
THE CPU16 NEED ONLY GENERATE A 20-BIT EFFECTIVE ADDRESS TO ACCESS ANY LOCATION IN THIS RANGE.
$000000
$010000
$020000
$030000
$040000
$050000
$060000
$070000
$07FFFF
$F90000
$FA0000
$FB0000
$FD0000
$FE0000
$FFFFFF
$F7FFFF
$F80000
$FF0000
1
BANK 0
BANK 1
BANK 2
BANK 3
BANK 4
BANK 5
BANK 6
BANK 7
BANK 9
BANK 10
BANK 13
BANK 8
BANK 11
BANK 12
BANK 14
BANK 15
UNDEFINED
Freescale Semiconductor, Inc.
RESET AND EXCEPTION
INTERNAL REGISTERS
For More Information On This Product,
PROGRAM
AND DATA
VECTORS
SPACE
Go to: www.freescale.com
OVERVIEW
0012–001C
0032–006E
0070–01FE
ADDRESS
VECTOR
0000
0002
0004
0006
0008
000A
000C
000E
0010
001E
0020
0022
0024
0026
0028
002A
002C
002E
0030
(CONTROL)
(CONTROL)
SRAM
ROM
QSM
ADC
GPT
SIM
VECTOR
NUMBER
19–37
38–FF
9–E
10
11
12
13
14
15
16
17
18
0
4
5
6
7
8
F
RESET — INITIAL IZ (DIRECT PAGE)
LEVEL 1 INTERRUPT AUTOVECTOR
LEVEL 2 INTERRUPT AUTOVECTOR
LEVEL 3 INTERRUPT AUTOVECTOR
LEVEL 4 INTERRUPT AUTOVECTOR
LEVEL 5 INTERRUPT AUTOVECTOR
LEVEL 6 INTERRUPT AUTOVECTOR
LEVEL 7 INTERRUPT AUTOVECTOR
RESET — INITIAL ZK, SK, AND PK
SWI (SOFTWARE INTERRUPT)
USER-DEFINED INTERRUPTS
UNINITIALIZED INTERRUPT
$YFF700
$YFF73F
$YFF820
$YFF83F
$YFF900
$YFF93F
$YFFA00
$YFFA7F
$YFFB00
$YFFB07
$YFFC00
$YFFDFF
UNASSIGNED, RESERVED
UNASSIGNED, RESERVED
UNASSIGNED, RESERVED
ILLEGAL INSTRUCTION
SPURIOUS INTERRUPT
RESET — INITIAL PC
RESET — INITIAL SP
BKPT (BREAKPOINT)
BERR (BUS ERROR)
DIVISION BY ZERO
EXCEPTION
TYPE OF
HC16 Z2/Z3 MEM MAP (C)
$000000
$0001FE
3-21