R4F24268NVFQV Renesas Electronics America, R4F24268NVFQV Datasheet - Page 372
![MCU 256K FLASH 48K 144-LQFP](/photos/28/61/286117/144-lqfp__plqp0144ka-a_sml.jpg)
R4F24268NVFQV
Manufacturer Part Number
R4F24268NVFQV
Description
MCU 256K FLASH 48K 144-LQFP
Manufacturer
Renesas Electronics America
Series
H8® H8S/2400r
Datasheet
1.R4F24268NVZFQV.pdf
(1406 pages)
Specifications of R4F24268NVFQV
Core Processor
H8S/2600
Core Size
16/32-Bit
Speed
33MHz
Connectivity
EBI/EMI, I²C, IrDA, SCI, SSU, UART/USART
Peripherals
DMA, POR, PWM, WDT
Number Of I /o
96
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
48K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 10x10b, D/A 2x8b
Oscillator Type
External
Operating Temperature
-20°C ~ 75°C
Package / Case
144-LQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
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Part Number:
R4F24268NVFQV
Manufacturer:
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Section 7 DMA Controller (DMAC)
7.3.6
The DMAC can activate the DTC with a transfer end interrupt, rewrite the channel on which the
transfer ended using a DTC chain transfer, and then reactivate the DTC. DMAWER applies
restrictions for changing all bits of DMACR, and specific bits for DMATCR and DMABCR for
the specific channel, to prevent inadvertent rewriting of registers other than those for the channel
concerned. The restrictions applied by DMAWER are valid for the DTC.
Page 342 of 1372
Bit
7 to 4
3
2
1
0
Bit Name
⎯
WE1B
WE1A
WE0B
WE0A
DMA Write Enable Register (DMAWER)
Initial Value
All 0
0
0
0
0
R/W
⎯
R/W
R/W
R/W
R/W
Description
Reserved
These bits are always read as 0 and cannot be
modified.
Write Enable 1B
Enables or disables writes to all bits in DMACR1B,
bits 11, 7, and 3 in DMABCR, and bit 5 in
DMATCR.
0: Writes are disabled
1: Writes are enabled
Write Enable 1A
Enables or disables writes to all bits in DMACR1A,
and bits 10, 6, and 2 in DMABCR.
0: Writes are disabled
1: Writes are enabled
Write Enable 0B
Enables or disables writes to all bits in DMACR0B,
bits 9, 5, and 1 in DMABCR, and bit 4 in
DMATCR.
0: Writes are disabled
1: Writes are enabled
Write Enable 0A
Enables or disables writes to all bits in DMACR0A,
and bits 8, 4, and 0 in DMABCR.
0: Writes are disabled
1: Writes are enabled
H8S/2426, H8S/2426R, H8S/2424 Group
REJ09B0466-0350 Rev. 3.50
Jul 09, 2010
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