R4F24268NVFQV Renesas Electronics America, R4F24268NVFQV Datasheet - Page 65

• Manufacturer Part Number: R4F24268NVFQV
• Description: MCU 256K FLASH 48K 144-LQFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8S/2400r

Specifications of R4F24268NVFQV

• Core Processor: H8S/2600
• Core Size: 16/32-Bit
• Speed: 33MHz
• Connectivity: EBI/EMI, I²C, IrDA, SCI, SSU, UART/USART
• Peripherals: DMA, POR, PWM, WDT
• Number Of I /o: 96
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 48K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 10x10b, D/A 2x8b
• Oscillator Type: External
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 144-LQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

H8S/2426, H8S/2426R, H8S/2424 Group
REJ09B0466-0350 Rev. 3.50
Jul 09, 2010
Type
Bus
control
Symbol
CS7 to
CS0
AS
AH
RD
HWR
LWR
BREQ-A
BREQ-B
BREQO-A
BREQO-B
BACK-A
BACK-B
UCAS*
LCAS*
3
3
Pin No.
H8S/2426, H8S/2426R
PLQP0144KA-A PTLG0145JB-A
38 to 35,
110 to 107
90
90
89
88
87
132
134
130
133
131
135
85
86
M2, N2, M1, L1,
A13, A12, B13,
C12
G10
G10
G12
H11
J13
D5
B5
B6
A6
C7
C6
H12
H10
H8S/2424
PLQP0120LA-A,
PLQP0120KA-A
29, 71, 70, 106,
92 to 89
75
75
74
73
72
108
110
106
109
107
111
70
71
I/O
Output
Output
Output
Output
Output
Output
Input
Output
Output
Output
Output
Function
Signals that select division areas 7
to 0 in the external address space
When this pin is low, it indicates
that address output on the address
bus is valid.
Signal for holding the address
when an address/data multiplexed
I/O space is being accessed.
When this pin is low, it indicates
that the external address space is
being read.
Strobe signal indicating that an
external address space is to be
written to, and the upper half (D15
to D8) of the data bus is enabled.
Also functions as the write enable
signal for accessing the DRAM
space.
Strobe signal indicating that an
external address space is to be
written to, and the lower half (D7 to
D0) of the data bus is enabled.
The external bus master requests
the bus to this LSI.
External bus request signal when
the internal bus master accesses
an external space in the external
bus release state.
Indicates the bus is released to the
external bus master.
Upper column address strobe
signal for accessing the 16-bit
DRAM space. Also functions as the
column address strobe signal for
accessing the 8-bit DRAM space.
Lower column address strobe
signal for accessing the 16-bit
DRAM space.
Section 1 Overview
Page 35 of 1372