R4F24268NVFQV Renesas Electronics America, R4F24268NVFQV Datasheet - Page 997

• Manufacturer Part Number: R4F24268NVFQV
• Description: MCU 256K FLASH 48K 144-LQFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8S/2400r

Specifications of R4F24268NVFQV

• Core Processor: H8S/2600
• Core Size: 16/32-Bit
• Speed: 33MHz
• Connectivity: EBI/EMI, I²C, IrDA, SCI, SSU, UART/USART
• Peripherals: DMA, POR, PWM, WDT
• Number Of I /o: 96
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 48K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 10x10b, D/A 2x8b
• Oscillator Type: External
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 144-LQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

H8S/2426, H8S/2426R, H8S/2424 Group
16.3.5
ICSR is an 8-bit readable/writable register that performs confirmation of interrupt request flags
and status.
REJ09B0466-0350 Rev. 3.50
Jul 09, 2010
Bit
7
6
5
Bit Name
TDRE
TEND
RDRF
I
2
C Bus Status Register (ICSR)
Initial Value
0
0
0
R/W
R/W
R/W
R/W
Description
Transmit Data Register Empty
[Setting condition]
•
•
•
•
•
•
•
Transmit End
[Setting condition]
•
[Clearing conditions]
•
•
Receive Data Register Full
[Setting condition]
•
[Clearing conditions]
•
•
When data is transferred from ICDRT to ICDRS
and ICDRT becomes empty.
When TRS has been set.
When a start condition (including retransmission)
has been issued.
When a transition from the receive mode to the
transmit mode has been made in the slave mode.
[Clearing conditions]
When 0 is written in TDRE after reading
TDRE = 1.
When data is written in ICDRT.
When the ninth clock of SCL is rose while the
TDRE flag is 1.
When 0 is written in TEND after reading
TEND = 1.
When data is written in ICDRT.
When a received data is transferred from ICDRS
to ICDRR.
When 0 is written in RDRF after reading
RDRF = 1.
When data is read from ICDRR.
Section 16 I2C Bus Interface 2 (IIC2)
Page 967 of 1372