R8A77850ADBGV#RD0Z Renesas Electronics America, R8A77850ADBGV#RD0Z Datasheet - Page 1098

• Manufacturer Part Number: R8A77850ADBGV#RD0Z
• Description: IC SUPERH MPU ROMLESS 436-BGA
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7780r

Specifications of R8A77850ADBGV#RD0Z

• Core Processor: SH-4A
• Core Size: 32-Bit
• Speed: 600MHz
• Connectivity: Audio Codec, MMC, Serial Sound, SCI, SIO, SPI, SSI
• Peripherals: DMA, POR, WDT
• Number Of I /o: 108
• Program Memory Type: ROMless
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 1 V ~ 1.2 V
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 436-BGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -
• Data Converters: -

21. Serial Communication Interface with FIFO (SCIF)
21.3.12 Serial Port Register n (SCSPTR)
SCSPTR is a 16-bit readable/writable register that controls input/output and data for the port pins
multiplexed with the serial communication interface (SCIF) pins at all times. Input data can be
read from the RXD pin, and output data written to the TXD pin, and breaks in serial
transmission/reception controlled, by means of bits 1 and 0.
All SCSPTR bits except bits 6, 4, 2, and 0 are initialized to 0 by a power-on reset or manual reset;
the value of bits 6, 4, 2, and 0 is undefined. SCSPTR is not initialized in the module standby state.
Note that when reading data via a serial port pin in the SCIF, the peripheral clock value from 2
cycles before is read.
Rev.1.00 Jan. 10, 2008 Page 1066 of 1658
REJ09B0261-0100
Initial value:
Bit
15 to 8
7
R/W:
BIt:
Bit Name
—
RTSIO*
15
⎯
R
0
14
⎯
R
0
13
⎯
R
0
Initial
Value
All 0
0
12
⎯
R
0
11
⎯
R
0
R/W
R
R/W
10
⎯
R
0
Description
Reserved
These bits are always read as 0. The write value
should always be 0.
Serial Port SCIF_RTS Port Input/Output
Specifies the serial port SCIF_RTS pin input/output
condition. When actually setting the SCIF_RTS pin as
a port output pin to output the value set by the RTSDT
bit, the MCE bit in SCFCR should be cleared to 0.
0: RTSDT bit value is not output to SCIF_RTS pin
1: RTSDT bit value is output to SCIF_RTS pin
⎯
R
9
0
⎯
R
8
0
R/W
RTS
IO*
7
0
R/W
RTS
DT*
⎯
6
R/W
CTS
IO*
5
0
R/W
CTS
DT*
⎯
4
R/W
SCK
IO
3
0
R/W
SCK
DT
⎯
2
SPB2
R/W
IO
1
0
SPB2
R/W
DT
⎯
0