R8A77850ADBGV#RD0Z Renesas Electronics America, R8A77850ADBGV#RD0Z Datasheet - Page 81

• Manufacturer Part Number: R8A77850ADBGV#RD0Z
• Description: IC SUPERH MPU ROMLESS 436-BGA
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7780r

Specifications of R8A77850ADBGV#RD0Z

• Core Processor: SH-4A
• Core Size: 32-Bit
• Speed: 600MHz
• Connectivity: Audio Codec, MMC, Serial Sound, SCI, SIO, SPI, SSI
• Peripherals: DMA, POR, WDT
• Number Of I /o: 108
• Program Memory Type: ROMless
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 1 V ~ 1.2 V
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 436-BGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -
• Data Converters: -

Addressing
Mode
GBR indirect
with displace-
ment
Indexed GBR
indirect
PC-relative
with
displacement
Instruction
Format
@(disp:8,
GBR)
@(R0, GBR)
@(disp:8, PC)
Effective Address Calculation Method
Effective address is register GBR contents with
8-bit displacement disp added. After disp is
zero-extended, it is multiplied by 1 (byte), 2 (word),
or 4 (longword), according to the operand size.
Effective address is sum of register GBR and R0
contents.
Effective address is PC + 4 with 8-bit displacement
disp added. After disp is zero-extended, it is
multiplied by 2 (word), or 4 (longword), according
to the operand size. With a longword operand,
the lower 2 bits of PC are masked.
(zero-extended)
H'FFFF FFFC
GBR
(zero-extended)
GBR
1/2/4
disp
R0
PC
4
disp
2/4
& *
×
+
+
×
+
* With longword operand
+
Rev.1.00 Jan. 10, 2008 Page 49 of 1658
+ disp × 1/2/4
GBR + R0
PC + 4 + disp
+ 4 + disp × 4
H'FFFF FFFC
GBR
or PC &
× 2
REJ09B0261-0100
3. Instruction Set
Calculation
Formula
Byte: GBR +
disp → EA
Word: GBR +
disp × 2 → EA
Longword:
GBR + disp ×
4 → EA
GBR + R0 →
EA
Word: PC + 4
+ disp × 2 →
EA
Longword:
PC & H'FFFF
FFFC + 4 +
disp × 4 → EA