R8A77850ADBGV#RD0Z Renesas Electronics America, R8A77850ADBGV#RD0Z Datasheet - Page 148

• Manufacturer Part Number: R8A77850ADBGV#RD0Z
• Description: IC SUPERH MPU ROMLESS 436-BGA
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7780r

Specifications of R8A77850ADBGV#RD0Z

• Core Processor: SH-4A
• Core Size: 32-Bit
• Speed: 600MHz
• Connectivity: Audio Codec, MMC, Serial Sound, SCI, SIO, SPI, SSI
• Peripherals: DMA, POR, WDT
• Number Of I /o: 108
• Program Memory Type: ROMless
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 1 V ~ 1.2 V
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 436-BGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -
• Data Converters: -

5. Exception Handling
(11) General FPU Disable Exception
• Source: Decoding of an FPU instruction* not in a delay slot with SR.FD = 1
• Transition address: VBR + H'00000100
• Transition operations:
Note: * FPU instructions are instructions in which the first 4 bits of the instruction code are F
Rev.1.00 Jan. 10, 2008 Page 116 of 1658
REJ09B0261-0100
General_fpu_disable_exception()
{
}
The PC and SR contents for the instruction at which this exception occurred are saved in SPC
and SSR. The R15 contents at this time are saved in SGR.
Exception code H'800 is set in EXPEVT. The BL, MD, and RB bits are set to 1 in SR, and a
branch is made to PC = VBR + H'0100.
SPC = PC;
SSR = SR;
SGR = R15;
EXPEVT = H'0000 0800;
SR.MD = 1;
SR.RB = 1;
SR.BL = 1;
PC = VBR + H'0000 0100;
(but excluding undefined instruction H'FFFD), and the LDS, STS, LDS.L, and STS.L
instructions corresponding to FPUL and FPSCR.