R8A77850ADBGV#RD0Z Renesas Electronics America, R8A77850ADBGV#RD0Z Datasheet - Page 1569

• Manufacturer Part Number: R8A77850ADBGV#RD0Z
• Description: IC SUPERH MPU ROMLESS 436-BGA
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7780r

Specifications of R8A77850ADBGV#RD0Z

• Core Processor: SH-4A
• Core Size: 32-Bit
• Speed: 600MHz
• Connectivity: Audio Codec, MMC, Serial Sound, SCI, SIO, SPI, SSI
• Peripherals: DMA, POR, WDT
• Number Of I /o: 108
• Program Memory Type: ROMless
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 1 V ~ 1.2 V
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 436-BGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -
• Data Converters: -

Module
Name
PCIC
Name
PCI capabilities pointer register
PCI interrupt line register
PCI interrupt pin register
PCI minimum grant register
PCI maximum latency register
PCI capability ID register
PCI next item pointer register
PCI power management capability register
PCI power management control/status
register
PCI PMCSR bridge support extension
register
PCI power consumption/dissipation data
register
PCI local register space (physical address: H'FE04 0100 to H'FE04 03FF)
PCI control register
PCI local space register 0
PCI local space register 1
PCI local address register 0
PCI local address register 1
PCI interrupt register
PCI interrupt mask register
PCI error address information register
PCI error command information register
PCI arbiter interrupt register
PCI arbiter interrupt mask register
PCI arbiter bus master error information
register
PCI PIO address register
PCI power management interrupt register
Abbrev.
PCICP
PCIINTLINE
PCIINTPIN
PCIMINGNT
PCIMAXLAT
PCICID
PCINIP
PCIPMC
PCIPMCSR
PCIPMCSR_BSE
PCIPCDD
PCICR
PCILSR0
PCILSR1
PCILAR0
PCILAR1
PCIIR
PCIIMR
PCIAIR
PCICIR
PCIAINT
PCIAINTM
PCIBMIR
PCIPAR
PCIPINT
Power-on
Reset by
PRESET Pin/
WDT/H-UDI
H'40
H'00
H'01
H'00
H'00
H'01
H'00
H'000A
H'0000
H'00
H'00
H'0000 00xx
H'0000 0000
H'0000 0000
H'0000 0000
H'0000 0000
H'0000 0000
H'0000 0000
H'xxxx xxxx
H'xx00 000x
H'0000 0000
H'0000 0000
H'0000 00xx
H'80xx xxxx
H'0000 0000
Rev.1.00 Jan. 10, 2008 Page 1537 of 1658
Manual Reset
by
WDT/Multiple
Exception
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
REJ09B0261-0100
31. Register List
Sleep/
Deep Sleep by
SLEEP
Instruction
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained