AT91SAM7SE256-CU Atmel, AT91SAM7SE256-CU Datasheet - Page 118

• Manufacturer Part Number: AT91SAM7SE256-CU
• Description: IC ARM7 MCU FLASH 256K 144-LFBGA
• Manufacturer: Atmel
• Series: AT91SAMr

Specifications of AT91SAM7SE256-CU

• Core Processor: ARM7
• Core Size: 16/32-Bit
• Speed: 55MHz
• Connectivity: EBI/EMI, I²C, SPI, SSC, UART/USART, USB
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 88
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 1.65 V ~ 1.95 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 144-LFBGA
• Processor Series: AT91SAMx
• Core: ARM7TDMI
• Data Bus Width: 32 bit
• Data Ram Size: 32 KB
• Interface Type: EBI, SPI, TWI, USART
• Maximum Clock Frequency: 48 MHz
• Number Of Programmable I/os: 32
• Number Of Timers: 3
• Operating Supply Voltage: 1.8 V to 3.3 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: JTRACE-ARM-2M, KSK-AT91SAM7S-PL, MDK-ARM, RL-ARM, ULINK2
• Development Tools By Supplier: AT91SAM-ICE, AT91-ISP, AT91SAM7SE-EK
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit
• For Use With: AT91SAM7SE-EK - EVAL BOARD FOR AT91SAM7SEAT91SAM-ICE - EMULATOR FOR AT91 ARM7/ARM9
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details
• Other names: AT91SAM7SE256-CJ; AT91SAM7SE256-CJ

20.2
20.2.1
Table 20-1.
118
Signal Name
VDDFLASH
VDDIO
VDDCORE
VDDPLL
GND
XIN
TST
PGMEN0
PGMEN1
Parallel Fast Flash Programming
SAM7SE512/256/32 Preliminary
Device Configuration
Signal Description List
Function
Flash Power Supply
I/O Lines Power Supply
Core Power Supply
PLL Power Supply
Ground
Main Clock Input.
This input can be tied to GND. In this
case, the device is clocked by the internal
RC oscillator.
Test Mode Select
Test Mode Select
Test Mode Select
In Fast Flash Programming Mode, the device is in a specific test mode. Only a certain set of pins
is significant. Other pins must be left unconnected.
Figure 20-1. Parallel Programming Interface
MODE[3:0]
DATA[15:0]
0 - 50MHz
NVALID
VDDIO
VDDIO
VDDIO
NCMD
NOE
RDY
Clocks
Power
Test
PGMD[15:0]
TST
PGMEN0
PGMEN1
PGMNCMD
PGMRDY
PGMNOE
PGMNVALID
PGMM[3:0]
XIN
Ground
Power
Power
Power
Power
Type
Input
Input
Input
Input
Active
Level
High
High
High
Comments
32KHz to 50MHz
Must be connected to VDDIO
Must be connected to VDDIO
Must be connected to VDDIO
VDDCORE
VDDIO
VDDPLL
VDDFLASH
GND
6222F–ATARM–14-Jan-11