AT91SAM7SE256-CU Atmel, AT91SAM7SE256-CU Datasheet - Page 325

• Manufacturer Part Number: AT91SAM7SE256-CU
• Description: IC ARM7 MCU FLASH 256K 144-LFBGA
• Manufacturer: Atmel
• Series: AT91SAMr

Specifications of AT91SAM7SE256-CU

• Core Processor: ARM7
• Core Size: 16/32-Bit
• Speed: 55MHz
• Connectivity: EBI/EMI, I²C, SPI, SSC, UART/USART, USB
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 88
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 1.65 V ~ 1.95 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 144-LFBGA
• Processor Series: AT91SAMx
• Core: ARM7TDMI
• Data Bus Width: 32 bit
• Data Ram Size: 32 KB
• Interface Type: EBI, SPI, TWI, USART
• Maximum Clock Frequency: 48 MHz
• Number Of Programmable I/os: 32
• Number Of Timers: 3
• Operating Supply Voltage: 1.8 V to 3.3 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: JTRACE-ARM-2M, KSK-AT91SAM7S-PL, MDK-ARM, RL-ARM, ULINK2
• Development Tools By Supplier: AT91SAM-ICE, AT91-ISP, AT91SAM7SE-EK
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit
• For Use With: AT91SAM7SE-EK - EVAL BOARD FOR AT91SAM7SEAT91SAM-ICE - EMULATOR FOR AT91 ARM7/ARM9
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details
• Other names: AT91SAM7SE256-CJ; AT91SAM7SE256-CJ

31.4
Table 31-1.
31.5
31.5.1
31.5.2
31.5.3
6222F–ATARM–14-Jan-11
Pin Name
MISO
MOSI
SPCK
NPCS1-NPCS3
NPCS0/NSS
Signal Description
Product Dependencies
I/O Lines
Power Management
Interrupt
Signal Description
The pins used for interfacing the compliant external devices may be multiplexed with PIO lines.
The programmer must first program the PIO controllers to assign the SPI pins to their peripheral
functions.
The SPI may be clocked through the Power Management Controller (PMC), thus the program-
mer must first configure the PMC to enable the SPI clock.
The SPI interface has an interrupt line connected to the Advanced Interrupt Controller (AIC).
Handling the SPI interrupt requires programming the AIC before configuring the SPI.
Pin Description
Master In Slave Out
Master Out Slave In
Serial Clock
Peripheral Chip Selects
Peripheral Chip Select/Slave Select
SAM7SE512/256/32 Preliminary
Master
Input
Output
Output
Output
Output
Type
Slave
Output
Input
Input
Unused
Input
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