AT91SAM7SE256-CU Atmel, AT91SAM7SE256-CU Datasheet - Page 587

IC ARM7 MCU FLASH 256K 144-LFBGA

AT91SAM7SE256-CU

Manufacturer Part Number
AT91SAM7SE256-CU
Description
IC ARM7 MCU FLASH 256K 144-LFBGA
Manufacturer
Atmel
Series
AT91SAMr
Datasheet

Specifications of AT91SAM7SE256-CU

Core Processor
ARM7
Core Size
16/32-Bit
Speed
55MHz
Connectivity
EBI/EMI, I²C, SPI, SSC, UART/USART, USB
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
88
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
32K x 8
Voltage - Supply (vcc/vdd)
1.65 V ~ 1.95 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
144-LFBGA
Processor Series
AT91SAMx
Core
ARM7TDMI
Data Bus Width
32 bit
Data Ram Size
32 KB
Interface Type
EBI, SPI, TWI, USART
Maximum Clock Frequency
48 MHz
Number Of Programmable I/os
32
Number Of Timers
3
Operating Supply Voltage
1.8 V to 3.3 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
JTRACE-ARM-2M, KSK-AT91SAM7S-PL, MDK-ARM, RL-ARM, ULINK2
Development Tools By Supplier
AT91SAM-ICE, AT91-ISP, AT91SAM7SE-EK
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit
For Use With
AT91SAM7SE-EK - EVAL BOARD FOR AT91SAM7SEAT91SAM-ICE - EMULATOR FOR AT91 ARM7/ARM9
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
 Details
Other names
AT91SAM7SE256-CJ
AT91SAM7SE256-CJ

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
AT91SAM7SE256-CU
Manufacturer:
Atmel
Quantity:
10 000
Part Number:
AT91SAM7SE256-CU
Manufacturer:
ATMEL
Quantity:
18
Part Number:
AT91SAM7SE256-CU-999
Manufacturer:
Atmel
Quantity:
10 000
38.6.9
Name:
Access:
• EP0: Reset Endpoint 0
• EP1: Reset Endpoint 1
• EP2: Reset Endpoint 2
• EP3: Reset Endpoint 3
• EP4: Reset Endpoint 4
• EP5: Reset Endpoint 5
• EP6: Reset Endpoint 6
• EP7: Reset Endpoint 7
This flag is used to reset the FIFO associated with the endpoint and the bit RXBYTECOUNT in the register UDP_CSRx.It
also resets the data toggle to DATA0. It is useful after removing a HALT condition on a BULK endpoint. Refer to Chapter
5.8.5 in the USB Serial Bus Specification, Rev.2.0.
Warning: This flag must be cleared at the end of the reset. It does not clear UDP_CSRx flags.
0 = No reset.
1 = Forces the corresponding endpoint FIF0 pointers to 0, therefore RXBYTECNT field is read at 0 in UDP_CSRx register.
Resetting the endpoint is a two-step operation:
6222F–ATARM–14-Jan-11
1. Set the corresponding EPx field.
2. Clear the corresponding EPx field.
EP7
31
23
15
7
UDP Reset Endpoint Register
EP6
30
22
14
UDP_RST_EP
6
Read-write
EP5
29
21
13
5
EP4
28
20
12
4
SAM7SE512/256/32 Preliminary
EP3
27
19
11
3
EP2
26
18
10
2
EP1
25
17
9
1
EP0
24
16
8
0
587

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