MPC564CZP40 Freescale Semiconductor, MPC564CZP40 Datasheet - Page 1057

• Manufacturer Part Number: MPC564CZP40
• Description: IC MPU 32BIT W/CODE COMP 388PBGA
• Manufacturer: Freescale Semiconductor
• Series: MPC5xxr

Specifications of MPC564CZP40

• Core Processor: PowerPC
• Core Size: 32-Bit
• Speed: 40MHz
• Connectivity: CAN, EBI/EMI, SCI, SPI, UART/USART
• Peripherals: POR, PWM, WDT
• Number Of I /o: 56
• Program Memory Size: 512KB (512K x 8)
• Program Memory Type: FLASH
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 2.5 V ~ 2.7 V
• Data Converters: A/D 32x10b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 388-BGA
• Processor Series: MPC5xx
• Core: PowerPC
• Data Bus Width: 32 bit
• Data Ram Size: 32 KB
• Interface Type: CAN, JTAG, QSPI, SCI, SPI, UART
• Maximum Clock Frequency: 40 MHz
• Number Of Programmable I/os: 56
• Number Of Timers: 2
• Operating Supply Voltage: 0 V to 5 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 2 (10 bit, 32 Channel)
• For Use With: MPC564EVB - KIT EVAL FOR MPC561/562/563/564
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: No

25.1.2
To enable JTAG on reset for board test JCOMP/RSTI must be high on PORESET rising edge as shown in
Figure
Freescale Semiconductor
JCOMP/RSTI
25-3.
PORESET
Configuration
PORESET / TRST
Entering JTAG Mode
JCOMP / RSTI
JTAG puts all output pins in fast slew rate mode. Enough current cannot be
supplied to allow all the pins to be switched simultaneously, so this should
be avoided.
TDO
TMS
TCK
TDI
MPC561/MPC563 Reference Manual, Rev. 1.2
Figure 25-2. Test Logic Block Diagram
JTAG
Figure 25-3. JTAG Mode Selection
Instruction apply & decode register
3
Bypass
4-bit Instruction register
Boundary scan register
JTAG ON
TAP Controller
NOTE
2
TRST
1
0
JTAG off/READI Config
IEEE 1149.1-Compliant Interface (JTAG)
M
U
X
M
U
X
T
25-3