BGW200EG/01,518 NXP Semiconductors, BGW200EG/01,518 Datasheet - Page 11

• Manufacturer Part Number: BGW200EG/01,518
• Description: IC WLAN SIP MOD 802.11B 68HVQFN
• Manufacturer: NXP Semiconductors
• Series: BGW200r

Specifications of BGW200EG/01,518

• Frequency: 2.4GHz ~ 2.5GHz
• Modulation Or Protocol: DBPSK, DQPSK, CCK
• Applications: PDA's, Portable Audio/Video, Smartphones
• Power - Output: 8dBm ~ 18dBm
• Data Interface: PCB, Surface Mount
• Antenna Connector: PCB, Surface Mount
• Package / Case: 68-VQFN Exposed Pad, 68-HVQFN, 68-SQFN, 68-DHVQFN
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Voltage - Supply: -
• Operating Temperature: -
• Sensitivity: -
• Memory Size: -
• Data Rate - Maximum: -
• Current - Transmitting: -
• Current - Receiving: -
• Other names: 935279198518; BGW200EG/01-T; BGW200EG/01-T

NXP Semiconductors
8. SA2405 RF transceiver
BGW200EG_1
Product data sheet
Table 3.
The SA2405 RF transceiver is targeted for operation in the 2.45 GHz band, specifically for
IEEE 802.11b 1 Mbit/s and 2 Mbit/s DSSS, and 5.5 Mbit/s and 11 Mbit/s CCK high rate
standards.
The RF VCO is common to both the transmitter and the receiver. The RF VCO is a
differential 4.8 GHz Local Oscillator (LO) with the frequency determining components
internal to the IC. The VCO is connected internally to a frequency divider and a
quadrature generator circuit which produces the local oscillator frequencies for the I and Q
up mixers and down mixers. The divider output is also internally connected to the
synthesizer which can be programmed in order to produce the desired LO frequency. The
frequency step size of the synthesizer is 0.5 MHz.
The RF LNA has two stepped gains controlled internally by the on-chip AGC control loop.
The RF signal is downconverted to baseband by the quadrature mixers. The I and Q
low-pass filters are fully integrated active Type I Chebychev filters. The I/Q pass band
extends from DC to a 3 dB corner at 7 MHz. Three stepped gains are incorporated in the
channel filters. Additional adjustable gain is provided in baseband amplifiers to achieve a
totally adjustable gain range of 90 dB. The RX output to the baseband are differential I and
Q signals.
The RX chain also integrates a high-pass filter (DC notch) for cancellation of the DC offset
inherent to zero-IF architecture. The high-pass filter has a programmable lower 3 dB
cut-off frequency of 10 MHz, 1 MHz, 100 kHz or 10 kHz. The DC offset cancellation
occurs simultaneously with the on-chip AGC loop settling process. During the AGC
settling phase, the high-pass cut-off frequency is dynamically selected between 10 MHz
and 1 MHz to quickly reduce DC offset values from +50 dBc to below 20 dBc relative to a
Block name
MAC:
WEP
AES (CCM)
DMA
RFIF
TIMERS
ICU
UART
SPI:
SDIO
GPIO
76 dBm input signal at the antenna.
HW MAC
PHYTX
PHYRX
SPI1
SPI2
Subblock overview
Description
hardware medium access control layer
physical layer transmitter
physical layer receiver
WEP encryption and decryption engine
CCM encryption and decryption engine
general-purpose DMA engine
RF interface
system timers
interrupt control unit
universal asynchronous receiver/transmitter interface
master/slave serial peripheral interface
high-speed slave serial peripheral interface
secure digital input/output interface
general-purpose input/output pin(s)
Rev. 01 — 18 July 2007
…continued
IEEE 802.11b System-in-Package
BGW200EG
© NXP B.V. 2007. All rights reserved.
Reference
Section 10.3
Section 10.7
Section 10.8
Section 10.4
Section 10.5
Section 10.6
Section 10.9
Section 10.10
Section 10.11
Section 10.12
Section 10.13
Section 10.14
Section 10.15
Section 10.16
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