BGW200EG/01,518 NXP Semiconductors, BGW200EG/01,518 Datasheet - Page 47

• Manufacturer Part Number: BGW200EG/01,518
• Description: IC WLAN SIP MOD 802.11B 68HVQFN
• Manufacturer: NXP Semiconductors
• Series: BGW200r

Specifications of BGW200EG/01,518

• Frequency: 2.4GHz ~ 2.5GHz
• Modulation Or Protocol: DBPSK, DQPSK, CCK
• Applications: PDA's, Portable Audio/Video, Smartphones
• Power - Output: 8dBm ~ 18dBm
• Data Interface: PCB, Surface Mount
• Antenna Connector: PCB, Surface Mount
• Package / Case: 68-VQFN Exposed Pad, 68-HVQFN, 68-SQFN, 68-DHVQFN
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Voltage - Supply: -
• Operating Temperature: -
• Sensitivity: -
• Memory Size: -
• Data Rate - Maximum: -
• Current - Transmitting: -
• Current - Receiving: -
• Other names: 935279198518; BGW200EG/01-T; BGW200EG/01-T

NXP Semiconductors
Table 54.
Legend: * reset value
[1]
Table 55.
Legend: * reset value
[1]
[2]
Table 56.
Legend: * reset value
[1]
Table 57.
Legend: * reset value
BGW200EG_1
Product data sheet
Bit
7 to 0
Bit
7 to 0
Bit
7 to 0
Bit
7 to 3
2
1
0
Register definition is the same for all local scratch registers; replace n with the scratch register number (0 to 3).
Register definition is the same for all host mailboxes; replace n with the mailbox number (0 to 3).
Writing to this register generates an interrupt to the SDIO host if bit HMBn_INT_EN is set in register SD_HST_ISCR (see
host read clears the interrupt.
Register definition is the same for all host scratch registers; replace n with the scratch register number (0 to 3).
Symbol
SCRCH_DATA[7:0]
Symbol
MBOX_DATA[7:0]
Symbol
SCRCH_DATA[7:0]
Symbol
-
SDIO_HOST_RST
SDIO_FUNC_RST
SA2443A_RST
SD_LOC_SRn
SD_HST_MBn
SD_HST_SRn
SD_RST_CR register - SDIO reset control (FN1 0 0164h)
[1]
[1]
[1]
register - SDIO host scratch register n (FN1 0 0150h to 0 015Ch)
register - SDIO local scratch register n (FN1 0 0128h to 0 0134h)
register - SDIO host mailbox n (FN1 0 013Ch to 0 0148h)
Access
Local
R
Access
Local
R/W
Access
Local
R/W
Access
Local
R
R/W
R/W
R
[2]
Host
R/W
Host
R
Host
R
Host
R
R
R
R/W
Rev. 01 — 18 July 2007
Value
00h*
Value
00h*
Value
00h*
Value
00h*
0*
1
0*
1
0*
1
Description
scratch data
Description
mailbox data
Description
scratch data
Description
reserved
SDIO interface host side reset status
SDIO interface host side operational
SDIO interface host side reset ongoing
SDIO interface function side reset status
SDIO interface function side operational
SDIO interface function side reset ongoing
SA2443A reset control
do not reset SA2443A
reset SA2443A. A host write to this bit will result in
the SA2443A being reset.
IEEE 802.11b System-in-Package
BGW200EG
© NXP B.V. 2007. All rights reserved.
Table
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49). A