BGW200EG/01,518 NXP Semiconductors, BGW200EG/01,518 Datasheet - Page 7

• Manufacturer Part Number: BGW200EG/01,518
• Description: IC WLAN SIP MOD 802.11B 68HVQFN
• Manufacturer: NXP Semiconductors
• Series: BGW200r

Specifications of BGW200EG/01,518

• Frequency: 2.4GHz ~ 2.5GHz
• Modulation Or Protocol: DBPSK, DQPSK, CCK
• Applications: PDA's, Portable Audio/Video, Smartphones
• Power - Output: 8dBm ~ 18dBm
• Data Interface: PCB, Surface Mount
• Antenna Connector: PCB, Surface Mount
• Package / Case: 68-VQFN Exposed Pad, 68-HVQFN, 68-SQFN, 68-DHVQFN
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Voltage - Supply: -
• Operating Temperature: -
• Sensitivity: -
• Memory Size: -
• Data Rate - Maximum: -
• Current - Transmitting: -
• Current - Receiving: -
• Other names: 935279198518; BGW200EG/01-T; BGW200EG/01-T

NXP Semiconductors
Table 2.
BGW200EG_1
Product data sheet
Symbol
TEST_AGCRESET 64
REFCLK_OUT
Bluetooth coexistence interface
GPIO0
GPIO1
GPIO2
GPIO3
GPIO interface
GPIO9
GPIO10
JTAG and debug interface
JTAG_TCLK
JTAG_RTCLK
JTAG_TMS
JTAG_TRST_N
JTAG_TDI
JTAG_TDO
DEBUG_EN
Miscellaneous
OSC_B
OSC_E
GPIO4
RST_N
POR_N
MODE0
MODE1
MODE2
[2]
Pin description
Pin
13
52
51
50
49
32
33
44
43
45
47
46
42
22
10
11
23
29
21
19
20
14
Type
O
O
O; O; I/O 3-state; 3 ns slew rate;
I; I/O
I; I/O
O; I/O
I/O
I/O
I
O
I
I
I
O
I
I
O
I; I/O
I
O
I
I
-
…continued
Circuit
push-pull; 3 ns slew rate;
4 mA
CMOS
4 mA; CMOS; hysteresis
3-state; 3 ns slew rate;
4 mA; CMOS; hysteresis
3-state; 3 ns slew rate;
4 mA; CMOS; hysteresis
3-state; 3 ns slew rate;
4 mA; CMOS; hysteresis
3-state; 3 ns slew rate;
4 mA; CMOS; hysteresis
3-state; 3 ns slew rate;
4 mA; CMOS; hysteresis
CMOS; hysteresis; pull-up -
push-pull; 3 ns slew rate;
4 mA
CMOS; hysteresis; pull-up -
CMOS; hysteresis; pull-up -
CMOS; hysteresis; pull-up -
3-state; 3 ns slew rate;
4 mA
CMOS; hysteresis;
pull-down
analog
analog
3-state; 3 ns slew rate;
4 mA; CMOS; hysteresis
CMOS; hysteresis
push-pull; 3 ns slew rate;
4 mA
CMOS; hysteresis
CMOS; hysteresis
connected to ground
Rev. 01 — 18 July 2007
Reset
LOW
-
I, pull-down V
I, pull-down V
I, pull-down V
I, pull-down V
I, pull-down V
I, pull-down V
LOW
high-Z
-
-
-
I, pull-down V
-
LOW
-
-
-
[1]
Supply
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
-
DDD(IO)
DDA
DDD(IO)
DDD(IO)
DDD(IO)
DDD(IO)
DDD(IO)
DDD(IO)
DDD(IO)
DDD(IO)
DDD(IO)
DDD(IO)
DDD(IO)
DDD(IO)
DDD(IO)
DDA
DDA
DDD(IO)
DDD(IO)
DDD(IO)
DDD(IO)
DDD(IO)
IEEE 802.11b System-in-Package
Description
test pin for RF AGC reset;
output
test pin for 44 MHz clock output
WLAN arbitration signal output;
HW MAC CCA output;
general-purpose I/O bit 0;
bidirectional
BT arbitration signal input;
general-purpose I/O bit 1;
bidirectional
BT high priority traffic indicator
input; general-purpose I/O bit 2;
bidirectional
WLAN receive indicator output;
general-purpose I/O bit 3;
bidirectional
general-purpose I/O bit 9;
bidirectional
general-purpose I/O bit 10;
bidirectional
JTAG clock input
synchronized JTAG clock output
JTAG test mode select input
JTAG reset input; active LOW
JTAG test data input
JTAG test data output
debug enable input
crystal oscillator / buffer input
crystal oscillator output
32 kHz sleep clock input;
general-purpose I/O bit 4;
bidirectional
system reset input; active LOW
power-on reset output; active
LOW
load source 0 input
load source 1 input
reserved for pin-compatibility
with BGW211
BGW200EG
© NXP B.V. 2007. All rights reserved.
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