BGW200EG/01,518 NXP Semiconductors, BGW200EG/01,518 Datasheet - Page 12

• Manufacturer Part Number: BGW200EG/01,518
• Description: IC WLAN SIP MOD 802.11B 68HVQFN
• Manufacturer: NXP Semiconductors
• Series: BGW200r

Specifications of BGW200EG/01,518

• Frequency: 2.4GHz ~ 2.5GHz
• Modulation Or Protocol: DBPSK, DQPSK, CCK
• Applications: PDA's, Portable Audio/Video, Smartphones
• Power - Output: 8dBm ~ 18dBm
• Data Interface: PCB, Surface Mount
• Antenna Connector: PCB, Surface Mount
• Package / Case: 68-VQFN Exposed Pad, 68-HVQFN, 68-SQFN, 68-DHVQFN
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Voltage - Supply: -
• Operating Temperature: -
• Sensitivity: -
• Memory Size: -
• Data Rate - Maximum: -
• Current - Transmitting: -
• Current - Receiving: -
• Other names: 935279198518; BGW200EG/01-T; BGW200EG/01-T

NXP Semiconductors
BGW200EG_1
Product data sheet
After the AGC settling (may be more than one AGC cycle with antenna diversity), the
high-pass is configured to 100 kHz for 5 s before switching to a final 10 kHz cut-off
frequency. The low value of 10 kHz is required for minimizing the signal distortion created
by a high-pass function at zero frequency. The high-pass will then remain set to the
10 kHz cut-off frequency until a new AGC cycle for the next receive data burst is started.
Whenever there is a frequency change in the high-pass filter lower cut-off, the DC offset
can change from a very low value to approximately 50 % (1 MHz
(100 kHz
high-pass response of the filter.
The receiver contains a fully integrated automatic gain control loop. It works by adjusting
the internal gain such that the RX output amplitude meets a predefined target value.
A measured RSSI is used to realize the gain adjustment. By default, the AGC is always
set to a default maximum gain (adjustable by register value GMAX) whenever the
BGW200EG enters the receive mode of operation from another operational mode. The
receiver takes 5 s to settle after entering the receive mode, which includes the time for
DC offsets to be removed with a 1 MHz lower cut-off frequency of the high-pass filtering.
This lower cut-off frequency of 1 MHz remains unchanged as long as the AGC remains in
the default maximum gain state. By successively reducing the gain from its initial
maximum value, the AGC loop searches for the correct gain value to provide a nominal
RX output amplitude to the baseband. This is achieved after a maximum of 8 s with the
default wait periods. This settling time is determined by wait periods necessary to settle
the receiver after gain switching actions. The individual wait periods can be adjusted by
means of register settings.
The Receive Signal Strength Indicator (RSSI) is implemented as an error signal derived
from comparing the signal level at the RX output to a nominal value. The RSSI acts on the
modulated RF signal envelope that is extracted from the baseband I and Q signals, and
reflects on a logarithmic scale the amplitude of the instantaneous modulated RF signal
envelope. The RSSI signal is filtered by a 3rd-order Bessel low-pass filter with 0.5 MHz
cut-off frequency. The RSSI signal will include DC offsets and will, therefore, show
transient decaying errors when the DC cancellation corner frequency is changed.
The receiver is designed to exceed the 802.11 specifications for the blocking and
intermodulation. It can accept continuous or randomly pulsed interference single signals
or multitone signals that are more than 35 dB stronger than the required signal and up to
The transmitter input binary data streams are sampled with a 44 MHz reference clock and
integrated FIRDACs provide additional pulse shaping filtering. The wideband I/Q up
converter includes reconstruction filters (4th order low-pass Butterworth with 9.75 MHz
3 dB upper cut-off frequency). At 18 dBm maximum transmitter output level, the
out-of-band (FCC forbidden band) spurious signal power is less than 77 dBc (integrated
over 1 MHz with a 100 kHz resolution bandwidth) for the 11 Msymbol/s CCK modulation.
By using the on-chip calibration loop the transmitter carrier leakage can be reduced to
levels far less than required by the standard. An RF power meter detects the LO level,
converts it into a digital signal and a state machine determines the compensation values
which are fed through an on-chip DAC directly to the I/Q inputs. The I/Q gain and phase
imbalance, the InterSymbol Interference (ISI) of the reconstruction filter and in-channel
noise produce a typical modulation EVM of less than 8 % (RMS) for 11 Msymbol/s CCK
modulation.
10 dBm of interference level. The spurious I and Q outputs are maintained to less than
20 dBc of the required signal level.
10 kHz step) of the signal level. This DC offset then decays according to the
Rev. 01 — 18 July 2007
IEEE 802.11b System-in-Package
BGW200EG
100 kHz step) or 10 %
© NXP B.V. 2007. All rights reserved.
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