XRT75R12DIB-F Exar Corporation, XRT75R12DIB-F Datasheet - Page 126

Peripheral Drivers & Components (PCIs) 12 Channel 3.3V-5V temp -45 to 85C

XRT75R12DIB-F

Manufacturer Part Number
XRT75R12DIB-F
Description
Peripheral Drivers & Components (PCIs) 12 Channel 3.3V-5V temp -45 to 85C
Manufacturer
Exar Corporation
Datasheet

Specifications of XRT75R12DIB-F

Maximum Operating Temperature
+ 85 C
Minimum Operating Temperature
- 40 C
Mounting Style
SMD/SMT
Operating Supply Voltage
3.3 V to 5 V
Package / Case
TBGA-420
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
XRT75R12D
TWELVE CHANNEL E3/DS3/STS-1 LINE INTERFACE UNIT WITH SONET DESYNCHRONIZER
Figure 69 presents an illustration which depicts the procedure that is used to synthesize MAJOR PATTERN B.
These 622 clock pulses were delivered over a period of "(63 x 8) + (35 x 6) + 6 = 720 STS-1 (or 51.84MHz)
clock periods.
PUTTING THE PATTERNS TOGETHER
Finally, the DS3 to OC-N Mapper IC clock output is reproduced by doing the following.
Throughout the remainder of this document, we will refer to this particular pattern as the "SUPER PATTERN".
Figure 70 presents an illustration of this "SUPER PATTERN" which is output via the Mapper IC.
APPLYING THE SUPER PATTERN TO THE LIU
Whenever the LIU is configured to operate in a "SONET De-Sync" application, the device will accept a
continuous string of the above-defined SUPER PATTERN, via the TCLK input pin (along with the
corresponding data). The channel within the LIU (which will be configured to operate in the "DS3" Mode) will
F
F
Hence, MAJOR PATTERN B consists of "(63 x 7) + (35 x 5)" + 6 = 622 clock pulses.
CROSS-CHECKING OUR DATA
IGURE
IGURE
MAJOR PATTERN A is transmitted two times (repeatedly).
After the second transmission of MAJOR PATTERN A, MAJOR PATTERN B is transmitted once.
Then the whole process repeats.
Each SUPER PATTERN consists of (621 + 621 + 622) = 1864 clock pulses.
The total amount of time, which is required for the "DS3 to OC-N Mapper" IC to transmit this SUPER
PATTERN is (720 + 720 + 720) = 2160 "STS-1" clock periods.
This amount to a period of (2160/51.84MHz) = 41,667ns.
In a period of 41, 667ns, the LIU (when configured to operate in the DS3 Mode), will output a total (41,667ns
x 44,736,000) = 1864 uniformly spaced DS3 clock pulses.
Hence, the number of clock pulses match.
69. I
70. I
LLUSTRATION OF THE
LLUSTRATION OF
PATTERN A
Repeats 63 Times
PATTERN P1
P
ROCEDURE WHICH IS USED TO
SUPER PATTERN
PATTERN A
Repeats 35 Times
PATTERN P2
WHICH IS OUTPUT VIA THE
122
S
YNTHESIZE
PATTERN B
Transmitted 1 Time
PATTERN B
PATTERN P3
"OC-N
TO
DS3" M
APPER
REV. 1.0.3
IC

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