XRT75R12DIB-F Exar Corporation, XRT75R12DIB-F Datasheet - Page 80

• Manufacturer Part Number: XRT75R12DIB-F
• Description: Peripheral Drivers & Components (PCIs) 12 Channel 3.3V-5V temp -45 to 85C
• Manufacturer: Exar Corporation

Specifications of XRT75R12DIB-F

• Maximum Operating Temperature: + 85 C
• Minimum Operating Temperature: - 40 C
• Mounting Style: SMD/SMT
• Operating Supply Voltage: 3.3 V to 5 V
• Package / Case: TBGA-420
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

XRT75R12D
TWELVE CHANNEL E3/DS3/STS-1 LINE INTERFACE UNIT WITH SONET DESYNCHRONIZER
T
B
RANSMIT
IT
B
7 - 6
N
T
IT
ABLE
UMBER
5
4
3
7
Reserved
C
33: XRT75R12D R
ONTROL
Insert PRBS Error
Internal Transmit
Drive Monitor
B
Reserved
Reserved
IT
Enable
R
N
6
EGISTER
AME
Drive Monitor
Transmit
- C
EGISTER
Internal
B
R/W
HANNEL N
IT
T
R/W
R/W
5
YPE
MAP
Internal Transmit Drive Monitor Enable - Channel_n:
This READ/WRITE bit-field is used to configure the Transmit Section of
Channel_n to either internally or externally monitor the TTIP_n and
TRING_n output pins for bipolar pulses, in order to determine whether to
declare the Transmit DMO Alarm condition.
If the user configures the Transmit Section to externally monitor the TTIP_n
and TRING_n output pins (for bipolar pulses) then the user must connect
the MTIP_n and MRING_n input pins to their corresponding TTIP_n and
TRING_n output pins (via a 270 ohm series resistor).
If the user configures the Transmit Section to internally monitor the TTIP_n
and TRING_n output pins (for bipolar pulses), the user does NOT need to
conect the MTIP_n and MRING_n input pins. This monitoring will be per-
formed internally at the TTIP_n and TRING_n pads.
0 - Configures the Transmit Drive Monitor to externally monitor the TTIP_n
and TRING_n output pins for bipolar pulses.
1 - Configures the Transmit Drive Monitor to internally monitor the TTIP_n
and TRING_n output pins for bipolar pulses.
Insert PRBS Error - Channel_n:
A "0 to 1" transition within this bit-field causes the PRBS Generator (within
the Transmit Section of Channel_n) to generate a single bit error within the
outbound PRBS pattern-stream.
N
Insert PRBS
OTES
A
SHOWING
DDRESS
B
Error
1. This bit-field is only active if the PRBS Generator and Receiver
2. After writing the "1" into this register, the user must execute a write
R/W
IT
:
4
have been enabled within the corresponding Channel.
operation to clear this particular register bit to "0" in order to
facilitate the next "0 to 1" transition in this bit-field.
L
76
T
OCATION
RANSMIT
Reserved
B
IT
3
= 0
C
ONTROL
XM
4 (
D
ESCRIPTION
TAOS
B
M
R/W
R
IT
= 0-5 & 8-D)
EGISTERS
2
TxCLKINV
(TC_
B
R/W
IT
N
1
)
(
N
= [0:11])
TxLEV
REV. 1.0.3
B
R/W
IT
0