XRT75R12DIB-F Exar Corporation, XRT75R12DIB-F Datasheet - Page 4

Peripheral Drivers & Components (PCIs) 12 Channel 3.3V-5V temp -45 to 85C

XRT75R12DIB-F

Manufacturer Part Number
XRT75R12DIB-F
Description
Peripheral Drivers & Components (PCIs) 12 Channel 3.3V-5V temp -45 to 85C
Manufacturer
Exar Corporation
Datasheet

Specifications of XRT75R12DIB-F

Maximum Operating Temperature
+ 85 C
Minimum Operating Temperature
- 40 C
Mounting Style
SMD/SMT
Operating Supply Voltage
3.3 V to 5 V
Package / Case
TBGA-420
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
XRT75R12D
TWELVE CHANNEL E3/DS3/STS-1 LINE INTERFACE UNIT WITH SONET DESYNCHRONIZER
5.0 DIAGNOSTIC FEATURES ...................................................................................................................31
6.0 THE TRANSMITTER SECTION ...........................................................................................................35
7.0 MICROPROCESSOR INTERFACE BLOCK ........................................................................................45
T
T
F
F
F
F
F
F
F
F
F
F
F
F
F
F
F
T
F
T
T
F
T
T
F
T
F
T
F
T
F
T
T
T
T
T
T
T
T
ABLE
ABLE
IGURE
IGURE
IGURE
IGURE
IGURE
IGURE
IGURE
IGURE
IGURE
IGURE
IGURE
IGURE
IGURE
IGURE
IGURE
ABLE
IGURE
ABLE
ABLE
IGURE
ABLE
ABLE
IGURE
ABLE
IGURE
ABLE
IGURE
ABLE
IGURE
ABLE
ABLE
ABLE
ABLE
ABLE
ABLE
ABLE
ABLE
4.3 JITTER ATTENUATOR ................................................................................................................................... 29
5.1 PRBS GENERATOR AND DETECTOR ......................................................................................................... 31
5.2 LOOPBACKS .................................................................................................................................................. 32
5.3 TRANSMIT ALL ONES (TAOS) ...................................................................................................................... 34
6.1 TRANSMIT CLOCK ........................................................................................................................................ 37
6.2 B3ZS/HDB3 ENCODER .................................................................................................................................. 37
6.3 TRANSMIT PULSE SHAPER ......................................................................................................................... 38
6.4 E3 LINE SIDE PARAMETERS ........................................................................................................................ 39
6.5 TRANSMIT DRIVE MONITOR ........................................................................................................................ 44
6.6 TRANSMITTER SECTION ON/OFF ............................................................................................................... 44
7.1 THE MICROPROCESSOR INTERFACE BLOCK SIGNALS ......................................................................... 46
7.2 ASYNCHRONOUS AND SYNCHRONOUS DESCRIPTION .......................................................................... 47
7.3 REGISTER MAP ............................................................................................................................................. 50
THE GLOBAL/CHIP-LEVEL REGISTERS ................................................................................................................ 59
REGISTER DESCRIPTION - GLOBAL REGISTERS ............................................................................................... 59
6: J
7: J
8: E3 T
9: STS-1 P
10: STS-1 T
11: DS3 P
12: DS3 T
13: S
14: XRT75R12D M
15: A
16: S
17: C
18: L
19: APS/R
20: APS/R
21: APS/R
22: APS/R
23: C
4.3.1 JITTER GENERATION................................................................................................................................................ 30
5.2.1 ANALOG LOOPBACK ................................................................................................................................................ 32
5.2.2 DIGITAL LOOPBACK ................................................................................................................................................. 33
5.2.3 REMOTE LOOPBACK ................................................................................................................................................ 33
6.2.1 B3ZS ENCODING ....................................................................................................................................................... 37
6.2.2 HDB3 ENCODING ....................................................................................................................................................... 37
6.3.1 GUIDELINES FOR USING TRANSMIT BUILD OUT CIRCUIT .................................................................................. 38
16. J
17. PRBS MODE ................................................................................................................................................................... 31
18. A
19. D
20. R
21. T
22. T
23. T
24. T
25. S
27. B3ZS E
26. D
28. HDB3 E
29. T
30. P
31. B
32. T
33. T
34. S
35. A
36. S
ITTER
ITTER
IST AND
ELECTING THE
SYNCHRONOUS
YNCHRONOUS
OMMAND
HANNEL
ITTER
NALOG
RANSMIT
RANSMIT
YPICAL INTERFACE BETWEEN TERMINAL EQUIPMENT AND THE
RANSMITTER
INGLE
RANSMIT
ULSE
ELLCORE
RANSMIT
RANSMIT
IMPLIFIED
SYNCHRONOUS
YNCHRONOUS
IGITAL
EMOTE
UAL
RANSMITTER LINE SIDE OUTPUT AND RECEIVER LINE SIDE INPUT SPECIFICATIONS
T
T
-R
RANSMITTER
ULSE
EDUNDANCY
EDUNDANCY
EDUNDANCY
EDUNDANCY
RANSFER
RANSFER
ULSE
-R
M
T
RANSMITTER
AIL
NCODING
L
NCODING
A
RANSFER
L
L
L
ASK FOR
OOPBACK
AIL OR
R
DDRESS
OOPBACK
EVEL
OOPBACK
A
P
P
O
D
GR-253 CORE T
M
D
B
EGISTER
LL
ATH
ULSE
M
RIVER
UPUT
ATA
LOCK
ASK
ASK
T
T
O
ICROPROCESSOR
M
ERMINAL
µP I
I
S
P
T
IMING
NTERRUPT
B
NRZ D
NES
ICROPROCESSOR
µP I
F
IMING
PECIFICATION
ASS
F
S
E
LOCK
F
E3 (34.368
P
R
E
L
L
T
R
T
R
M
ORMAT
D
ORMAT
HAPE
QUATIONS
............................................................................................................................................................ 33
ORMAT
ULSE
INE
OCATIONS OF
........................................................................................................................................................... 32
........................................................................................................................................................... 33
QUATIONS
RANSMIT
RANSMIT
EQUIREMENTS AND
NTERFACE
ECIEVE
ECIEVE
L
IAGRAM OF THE
A
ONITOR SET
(TAOS) ............................................................................................................................................ 34
NTERFACE
INE
M
DDRESS
S
S
S
PECIFICATIONS
ASKS
D
ATA
I
PECIFICATIONS
T
IDE
NPUT
T
IAGRAM
S
(
................................................................................................................................................. 37
................................................................................................................................................. 38
EST
EMPLATE FOR
ENCODER AND DECODER ARE DISABLED
IDE
E
C
C
F
RANSMIT
O
NABLE
C
C
............................................................................................................................................. 30
............................................................................................................................................. 42
ONTROL
ONTROL
ORMAT
MBITS
........................................................................................................................................... 40
M
/R
UTPUT AND
C
S
ONTROL
ONTROL
O
T
S
-
I
IRCUIT
IGNALS
AP
IMING
UTPUT AND
NTERFACE
EFERENCES
....................................................................................................................................... 35
UP
G
IGNALS
I
NTERFACE
,
LOBAL
R
................................................................................................................................... 44
/
M
WITHIN THE
S
(E
EGISTER
)
O
R
R
............................................................................................................................... 36
ICROPROCESSOR
............................................................................................................................... 49
.............................................................................................................................. 38
J
NCODER AND
INTERFACE AS PER ITU
R
R
............................................................................................................................. 48
EGISTER
EGISTER
UTPUT
D
ITTER
DS3
EGISTER
EGISTER
D
URING
R
R
URING
S
EGISTERS
ECEIVER
R
..................................................................................................................... 29
IGNALS
M
ECEIVER
AS PER
- CR96 (A
A
P
ODE
TTENUATOR
XRT75R12D ........................................................................................... 50
ULSE
P
- CR8 (A
- CR136 (A
P
ROGRAMMED
- CR0 (A
- CR128 (A
ROGRAMMED
.......................................................................................................... 45
......................................................................................................... 46
D
L
........................................................................................................ 59
T
B
INE
ECODER ARE
II
L
EMPLATE FOR
ELLCORE
I
INE
NTERFACE
DDRESS
DDRESS
S
DDRESS
IDE
P
S
DDRESS
XRT75R12D (
-
IDE
DDRESS
ERFORMANCE
T
I/O R
I
NPUT
G.703 ............................................................................. 39
I/O R
GR-499 ......................................................................... 42
L
I
).................................................................................... 37
NPUT
L
OCATION
B
L
OCATION
E
LOCK
EAD AND
OCATION
L
NABLED
SONET STS-1 A
S
EAD AND
L
OCATION
PECIFICATIONS
OCATION
S
PECIFICATIONS
........................................................................ 45
...................................................................... 30
= 0
DUAL
= 0
) .................................................................. 36
W
= 0
X
W
= 0
RITE
X
60) ......................................................... 62
= 0
-
.............................................................. 39
RITE
X
08) ....................................................... 60
RAIL DATA
00) ..................................................... 59
X
X
88) ................................................... 61
O
80) ................................................. 60
O
(GR-499) ...................................... 43
PERATIONS
PPLICATIONS
PERATIONS
(GR-253)................................... 41
)............................................ 35
.................................... 48
.................................. 47
................................. 40
REV. 1.0.3

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