AFS250-FGG256 Actel, AFS250-FGG256 Datasheet - Page 328

FPGA - Field Programmable Gate Array 250K System Gates

AFS250-FGG256

Manufacturer Part Number
AFS250-FGG256
Description
FPGA - Field Programmable Gate Array 250K System Gates
Manufacturer
Actel
Datasheet

Specifications of AFS250-FGG256

Processor Series
AFS250
Core
IP Core
Maximum Operating Frequency
1098.9 MHz
Number Of Programmable I/os
114
Data Ram Size
36864
Supply Voltage (max)
1.575 V
Maximum Operating Temperature
+ 70 C
Minimum Operating Temperature
0 C
Development Tools By Supplier
AFS-Eval-Kit, AFS-BRD600, FlashPro 3, FlashPro Lite, Silicon-Explorer II, Silicon-Sculptor 3, SI-EX-TCA
Mounting Style
SMD/SMT
Supply Voltage (min)
1.425 V
Number Of Gates
250 K
Package / Case
FPBGA-256
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
AFS250-FGG256
Manufacturer:
Actel
Quantity:
135
Part Number:
AFS250-FGG256
Manufacturer:
ACTEL
Quantity:
6 800
Part Number:
AFS250-FGG256
Manufacturer:
Microsemi SoC
Quantity:
10 000
Part Number:
AFS250-FGG256I
Manufacturer:
Microsemi SoC
Quantity:
10 000
Datasheet Information
5- 12
Revision
Advance v0.3
(continued)
Figure 2-65 • Analog Block Macro
The
The
The
The
Information about the maximum pad input frequency was added to the
section.
The
EQ 2
The
Figure 2-16 • Fusion Clocking Options
Table 2-46 · Analog Channel Specifications
The notes in
Input Tolerance Capabilities
The
LVPECL and LVDS were updated in
Attributes vs. I/O Standard
LVPECL and LVDS were updated in
Standard
The
All voltage-referenced Minimum and Maximum DC Input and Output Level tables
were updated.
All Timing Characteristic tables were updated
Table 2-83 • Summary of Maximum and Minimum DC Input and Output Levels
Applicable to Commercial and Industrial Conditions
Table 2-79 • Summary of I/O Timing Characteristics – Software Default Settings
was updated.
Table 2-93 • I/O Output Buffer Maximum Resistances
The
standards included in the datasheet.
The
Table 2-83 • Summary of Maximum and Minimum DC Input and Output Levels
Applicable to Commercial and Industrial Conditions
Table 2-79 • Summary of I/O Timing Characteristics – Software Default Settings
was updated.
Table 2-93 • I/O Output Buffer Maximum Resistances
The
standards included in the datasheet.
The
The
The
"Analog Quad" section
"Voltage Monitor" section
"Direct Digital Input" section
"Current Monitor" section
"Temperature Monitor" section
"ADC Description" section
"Simultaneously Switching Outputs and PCB Layout" section
"Timing Model"
"CoreMP7 and Cortex-M1 Software Tools" section
"108-Pin QFN" table
"180-Pin QFN" table
"208-Pin PQFP" table
"BLVDS/M-LVDS" section
"BLVDS/M-LVDS" section
is new.
Applications.
Table 2-72 • Fusion Standard and Advanced I/O – Hot-Swap and 5 V
was updated.
for the AFS090 device is new.
for the AFS090 device is new.
for the AFS090 device is new.
Applications.
was updated.
were updated.
was updated.
was updated.
was updated.
was updated.
is new. BLVDS and M-LVDS are two new I/O
is new. BLVDS and M-LVDS are two new I/O
was updated.
was updated.
Table 2-81 • Fusion Standard and Advanced I/O
R e visio n 1
Changes
Table 2-82 • Fusion Pro I/O Attributes vs. I/O
was updated.
was updated.
was updated.
was updated.
1
1
was updated.
is new.
was updated.
is new.
"Gate Driver"
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2-102
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2-149
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2-165
2-134
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2-257
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2-134
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N/A
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