PIC18F6722-E/PT Microchip Technology, PIC18F6722-E/PT Datasheet - Page 105

IC,MICROCONTROLLER,8-BIT,PIC CPU,CMOS,TQFP,64PIN,PLASTIC

PIC18F6722-E/PT

Manufacturer Part Number
PIC18F6722-E/PT
Description
IC,MICROCONTROLLER,8-BIT,PIC CPU,CMOS,TQFP,64PIN,PLASTIC
Manufacturer
Microchip Technology
Series
PIC® 18Fr

Specifications of PIC18F6722-E/PT

Rohs Compliant
YES
Core Processor
PIC
Core Size
8-Bit
Speed
25MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, HLVD, POR, PWM, WDT
Number Of I /o
54
Program Memory Size
128KB (64K x 16)
Program Memory Type
FLASH
Eeprom Size
1K x 8
Ram Size
3.8K x 8
Voltage - Supply (vcc/vdd)
4.2 V ~ 5.5 V
Data Converters
A/D 12x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
64-TFQFP
Processor Series
PIC18F
Core
PIC
Data Bus Width
8 bit
Data Ram Size
3936 B
Interface Type
SPI, I2C, EUSART
Maximum Clock Frequency
40 MHz
Number Of Programmable I/os
54
Number Of Timers
5
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000, ICE4000, DV164136, DM183032, DM183022
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 12 Channel
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
MA180020 - MODULE PLUG-IN HPC EXPL 18F87J11
Lead Free Status / Rohs Status
 Details

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
PIC18F6722-E/PT
Manufacturer:
Microchip Technology
Quantity:
10 000
7.5.3
Figure 7-3 shows an example of 16-bit Byte Select
mode. This mode allows table write operations to
word-wide external memories with byte selection
capability. This generally includes both word-wide
Flash and SRAM devices.
During a TBLWT cycle, the TABLAT data is presented
on the upper and lower byte of the AD<15:0> bus. The
WRH signal is strobed for each write cycle; the WRL
pin is not used. The BA0 or UB/LB signals are used to
select the byte to be written, based on the Least
Significant bit of the TBLPTR register.
FIGURE 7-3:
© 2008 Microchip Technology Inc.
Note 1:
PIC18F8X27/8X22
2:
3:
16-BIT BYTE SELECT MODE
A<19:16>
AD<15:8>
AD<7:0>
This signal only applies to table writes. See Section 6.1 “Table Reads and Table Writes”.
Upper-order address lines are used only for 20-bit address width.
Demultiplexing is only required when multiple memory devices are accessed.
WRH
WRL
ALE
BA0
OE
UB
I/O
LB
(2)
16-BIT BYTE SELECT MODE EXAMPLE
373
373
A<20:1>
A<20:1>
138
Flash and SRAM devices use different control signal
combinations to implement Byte Select mode. JEDEC
standard Flash memories require that a controller I/O
port pin be connected to the memory’s BYTE/WORD
pin to provide the select signal. They also use the BA0
signal from the controller as a byte address. JEDEC
standard static RAM memories, on the other hand, use
the UB or LB signals to select the byte.
PIC18F8722 FAMILY
(3)
A<x:1>
A<x:1>
CE
A0
CE
UB
BYTE/WORD
LB
OE
SRAM Memory
Flash Memory
WR
JEDEC Word
JEDEC Word
Address Bus
Data Bus
Control Lines
OE WR
(1)
D<15:0>
D<15:0>
DS39646C-page 103
(1)
D<15:0>
D<15:0>

Related parts for PIC18F6722-E/PT