PIC18F6722-E/PT Microchip Technology, PIC18F6722-E/PT Datasheet - Page 297

• Manufacturer Part Number: PIC18F6722-E/PT
• Description: IC,MICROCONTROLLER,8-BIT,PIC CPU,CMOS,TQFP,64PIN,PLASTIC
• Manufacturer: Microchip Technology
• Series: PIC® 18Fr

Specifications of PIC18F6722-E/PT

• Rohs Compliant: YES
• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 25MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, HLVD, POR, PWM, WDT
• Number Of I /o: 54
• Program Memory Size: 128KB (64K x 16)
• Program Memory Type: FLASH
• Eeprom Size: 1K x 8
• Ram Size: 3.8K x 8
• Voltage - Supply (vcc/vdd): 4.2 V ~ 5.5 V
• Data Converters: A/D 12x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 64-TFQFP
• Processor Series: PIC18F
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 3936 B
• Interface Type: SPI, I2C, EUSART
• Maximum Clock Frequency: 40 MHz
• Number Of Programmable I/os: 54
• Number Of Timers: 5
• Maximum Operating Temperature: + 125 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000, ICE4000, DV164136, DM183032, DM183022
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 12 Channel
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: MA180020 - MODULE PLUG-IN HPC EXPL 18F87J11
• Lead Free Status / Rohs Status: Details

24.6
When enabled, the HLVD circuitry continues to operate
during Sleep. If the device voltage crosses the trip
point, the HLVDIF bit will be set and the device will
wake-up from Sleep. Device execution will continue
from the interrupt vector address if interrupts have
been globally enabled.
TABLE 24-1:
© 2008 Microchip Technology Inc.
HLVDCON
INTCON
PIR2
PIE2
IPR2
TRISA
Legend: — = unimplemented, read as ‘0’. Shaded cells are unused by the HLVD module.
Note 1:
Name
Operation During Sleep
PORTA<7:6> and their direction bits are individually configured as port pins based on various primary
oscillator modes. When disabled, these bits read as ‘0’.
VDIRMAG
GIE/GIEH PEIE/GIEL TMR0IE
TRISA7
OSCFIF
OSCFIE
OSCFIP
Bit 7
REGISTERS ASSOCIATED WITH HIGH/LOW-VOLTAGE DETECT MODULE
(1)
TRISA6
CMIE
CMIP
CMIF
Bit 6
—
(1)
TRISA5
IRVST
Bit 5
—
—
—
HLVDEN
TRISA4
INT0IE
EEIE
EEIP
Bit 4
EEIF
HLVDL3
TRISA3
BCL1IF
BCL1IE
BCL1IP
24.7
A device Reset forces all registers to their Reset state.
This forces the HLVD module to be turned off.
RBIE
PIC18F8722 FAMILY
Bit 3
Effects of a Reset
HLVDL2
TMR0IF
HLVDIE
HLVDIP
HLVDIF
TRISA2
Bit 2
HLVDL1
TMR3IF
TMR3IE
TMR3IP
TRISA1
INT0IF
Bit 1
HLVDL0
CCP2IF
CCP2IE
CCP2IP
TRISA0
DS39646C-page 295
RBIF
Bit 0
on page
Values
Reset
58
57
60
60
60
60