PIC18F6722-E/PT Microchip Technology, PIC18F6722-E/PT Datasheet - Page 403

• Manufacturer Part Number: PIC18F6722-E/PT
• Description: IC,MICROCONTROLLER,8-BIT,PIC CPU,CMOS,TQFP,64PIN,PLASTIC
• Manufacturer: Microchip Technology
• Series: PIC® 18Fr

Specifications of PIC18F6722-E/PT

• Rohs Compliant: YES
• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 25MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, HLVD, POR, PWM, WDT
• Number Of I /o: 54
• Program Memory Size: 128KB (64K x 16)
• Program Memory Type: FLASH
• Eeprom Size: 1K x 8
• Ram Size: 3.8K x 8
• Voltage - Supply (vcc/vdd): 4.2 V ~ 5.5 V
• Data Converters: A/D 12x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 64-TFQFP
• Processor Series: PIC18F
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 3936 B
• Interface Type: SPI, I2C, EUSART
• Maximum Clock Frequency: 40 MHz
• Number Of Programmable I/os: 54
• Number Of Timers: 5
• Maximum Operating Temperature: + 125 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000, ICE4000, DV164136, DM183032, DM183022
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 12 Channel
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: MA180020 - MODULE PLUG-IN HPC EXPL 18F87J11
• Lead Free Status / Rohs Status: Details

FIGURE 28-8:
TABLE 28-10: CLKO AND I/O TIMING REQUIREMENTS
© 2008 Microchip Technology Inc.
Param.
150
151
155
160
161
162
163
164
165
166
167
168
169
171
171A
Operating Conditions: 2.0V < V
No
AD<15:0>
A<19:16>
OSC1
BA0
ALE
OE
TadV2alL
TalL2adl
TalL2oeL
TadZ2oeL
ToeH2adD OE ↑ to AD Driven
TadV2oeH LS Data Valid before OE ↑ (data setup time)
ToeH2adl
TalH2alL
ToeL2oeH OE Pulse Width
TalH2alH
Tacc
Toe
TalL2oeH
TalH2csL
TubL2oeH AD Valid to Chip Enable Active
CE
Symbol
Address Out Valid to ALE ↓ (address
setup time)
ALE ↓ to Address Out Invalid (address
hold time)
ALE ↓ to OE ↓
AD high-Z to OE ↓ (bus release to OE)
OE ↑ to Data In Invalid (data hold time)
ALE Pulse Width
ALE ↑ to ALE ↑ (cycle time)
Address Valid to Data Valid
OE ↓ to Data Valid
ALE ↓ to OE ↑
Chip Enable Active to ALE ↓
PROGRAM MEMORY READ TIMING DIAGRAM
Q1
CC
164
< 5.5V, -40°C < T
Address
150
151
Characteristics
171
171A
Q2
167
A
< +125°C unless otherwise stated.
155
160
Q3
Address
166
169
168
PIC18F8722 FAMILY
0.625 T
0.25 T
0.125 T
0.75 T
0.25 T
0.5 T
165
Data from External
Min
Q4
10
20
—
—
—
CY
5
0
0
CY
CY
CY
162
CY
CY
163
– 10
– 5
– 25
– 20
– 10
– 5
0.125 T
0.25 T
0.5 T
Typ
T
161
—
—
—
—
—
—
—
—
—
—
—
CY
Q1
CY
CY
CY
0.625 T
0.5 T
DS39646C-page 401
Max
CY
10
—
—
—
—
—
—
—
—
—
—
—
—
Address
Address
CY
– 25
+ 10
Q2
Units
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns