IPR-SDRAM/HPDDR Altera, IPR-SDRAM/HPDDR Datasheet - Page 7

• Manufacturer Part Number: IPR-SDRAM/HPDDR
• Description: IP CORE Renewal Of IP-SDRAM/HPDDR
• Manufacturer: Altera

Specifications of IPR-SDRAM/HPDDR

• Software Application: IP CORE, Memory Controllers, SDRAM
• Supported Families: Stratix FPGAs, Quartus II
• Core Architecture: FPGA
• Core Sub-architecture: Arria, Cyclone, Stratix
• Rohs Compliant: NA
• Lead Free Status / RoHS Status: na

Chapter 1: About These MegaCore Functions
MegaCore Verification
Figure 1–1. System-Level Diagram
Note for
(1) When you choose Instantiate DLL Externally, DLL is instantiated outside the controller.
MegaCore Verification
© March 2009 Altera Corporation
Figure
Pass or Fail
1–1:
Figure 1–1 on page 1–3
that the DDR or DDR2 SDRAM High-Performance Controller MegaCore functions
create for you.
The MegaWizard Plug-In Manager generates an example design, consisting of an
example driver, and your DDR or DDR2 SDRAM high-performance controller
custom variation. The controller instantiates an instance of the ALTMEMPHY
megafunction which in turn instantiates a PLL and DLL. You can optionally
instantiate the DLL outside the ALTMEMPHY megafunction to share the DLL
between multiple instances of the ALTMEMPHY megafunction.
The example design is a fully-functional design that you can simulate, synthesize, and
use in hardware. The example driver is a self-test module that issues read and write
commands to the controller and checks the read data to produce the pass/fail and test
complete signals.
MegaCore verification involves simulation testing. Altera has carried out extensive
random, directed tests with functional test coverage using industry-standard Denali
models to ensure the functionality of the DDR and DDR2 SDRAM high-performance
controller. In addition, Altera performs a wide variety of gate-level tests of the DDR
and DDR2 SDRAM high-performance controllers to verify the post-compilation
functionality of the controllers.
Example Design
Example Driver
Interface
Local
shows a system-level diagram including the example design
DDR/DDR2 SDRAM
PLL
High-Performance
ALTMEMPHY
Megafunction
(Encrypted)
Controller
Control
Logic
DDR and DDR2 SDRAM High-Performance Controller User Guide
DLL
(1)
SDRAM Interface
DDR/DDR2
DDR/DDR2
SDRAM
1–3