OM13005,598 NXP Semiconductors, OM13005,598 Datasheet - Page 144

BOARD EVAL EM773 METER US PLUG

OM13005,598

Manufacturer Part Number
OM13005,598
Description
BOARD EVAL EM773 METER US PLUG
Manufacturer
NXP Semiconductors
Type
Other Power Managementr
Datasheets

Specifications of OM13005,598

Design Resources
Plug Meter Schematics, Gerber Files USB Dongle Schematics, Gerber Files
Main Purpose
Power Management, Energy/Power Meter
Embedded
Yes, MCU, 32-Bit
Utilized Ic / Part
EM773FHN33,551
Interface Type
USB
Maximum Operating Temperature
+ 150 C
Operating Supply Voltage
1.8 V to 3.6 V
Product
Power Management Development Tools
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Primary Attributes
-
Secondary Attributes
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
For Use With/related Products
EM773, OL2381
Other names
568-6680
NXP Semiconductors
UM10415
User manual
11.7.2 SPI/SSP0 Control Register 1
This register controls certain aspects of the operation of the SPI/SSP controller.
Table 139: SPI/SSP Control Register 1 (SSP0CR1 - address 0x4004 0004) bit description
Bit
0
1
2
3
31:4
Symbol
LBM
SSE
MS
SOD
-
All information provided in this document is subject to legal disclaimers.
Value
0
1
0
1
0
1
Rev. 1 — 10 September 2010
Description
Loop Back Mode.
During normal operation.
Serial input is taken from the serial output (MOSI or MISO)
rather than the serial input pin (MISO or MOSI
respectively).
SPI Enable.
The SPI controller is disabled.
The SPI controller will interact with other devices on the
serial bus. Software should write the appropriate control
information to the other SPI/SSP registers and interrupt
controller registers, before setting this bit.
Master/Slave Mode.This bit can only be written when the
SSE bit is 0.
The SPI controller acts as a master on the bus, driving the
SCLK, MOSI, and SSEL lines and receiving the MISO line.
The SPI controller acts as a slave on the bus, driving MISO
line and receiving SCLK, MOSI, and SSEL lines.
Slave Output Disable. This bit is relevant only in slave
mode (MS = 1). If it is 1, this blocks this SPI controller from
driving the transmit data line (MISO).
Reserved, user software should not write ones to reserved
bits. The value read from a reserved bit is not defined.
Chapter 11: EM773 SPI0 with SSP
UM10415
© NXP B.V. 2010. All rights reserved.
Reset
Value
0
0
0
0
NA
144 of 310

Related parts for OM13005,598