OM13006,598 NXP Semiconductors, OM13006,598 Datasheet - Page 114

• Manufacturer Part Number: OM13006,598
• Description: BOARD EVAL EM773 METER EU PLUG
• Manufacturer: NXP Semiconductors
• Type: Other Power Managementr

Specifications of OM13006,598

• Design Resources: Plug Meter Schematics, Gerber Files USB Dongle Schematics, Gerber Files
• Main Purpose: Power Management, Energy/Power Meter
• Embedded: Yes, MCU, 32-Bit
• Utilized Ic / Part: EM773FHN33,551
• Interface Type: USB
• Maximum Operating Temperature: + 150 C
• Operating Supply Voltage: 1.8 V to 3.6 V
• Product: Power Management Development Tools
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Primary Attributes: -
• Secondary Attributes: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• For Use With/related Products: EM773, OL2381
• Other names: 568-6681

NXP Semiconductors
10.11 Details of I
UM10415
User manual
10.10.10 Status decoder and status register
10.10.8 Timing and control
10.10.9 Control register, I2CONSET and I2CONCLR
via the I
registers for details. The output clock pulses have a duty cycle as programmed unless the
bus is synchronizing with other SCL clock sources as described above.
The timing and control logic generates the timing and control signals for serial byte
handling. This logic block provides the shift pulses for I2DAT, enables the comparator,
generates and detects START and STOP conditions, receives and transmits acknowledge
bits, controls the master and slave modes, contains interrupt request logic, and monitors
the I
The I
and restart of a serial transfer, termination of a serial transfer, bit rate, address recognition,
and acknowledgment.
The contents of the I
will set bits in the I
Conversely, writing to I2CONCLR will clear bits in the I
to ones in the value written.
The status decoder takes all of the internal status bits and compresses them into a 5-bit
code. This code is unique for each I
generate vector addresses for fast processing of the various service routines. Each
service routine processes a particular bus status. There are 26 possible bus states if all
four modes of the I
significant bits of the status register when the serial interrupt flag is set (by hardware) and
remains stable until the interrupt flag is cleared by software. The three least significant bits
of the status register are always zero. If the status code is used as a vector to service
routines, then the routines are displaced by eight address locations. Eight bytes of code is
sufficient for most of the service routines (see the software example in this section).
The four operating modes are:
Data transfers in each mode of operation are shown in
Figure
describing the I
•
•
•
•
2
C operating modes
Master Transmitter
Master Receiver
Slave Receiver
Slave Transmitter
2
2
C-bus status.
C control register contains bits used to control the following I
26, and
2
C Clock Control Registers. See the description of the I2CSCLL and I2CSCLH
Figure
2
All information provided in this document is subject to legal disclaimers.
C operating modes.
2
2
C control register that correspond to ones in the value written.
C block are used. The 5-bit status code is latched into the five most
2
Rev. 1 — 10 September 2010
C control register may be read as I2CONSET. Writing to I2CONSET
27.
Table 127
2
lists abbreviations used in these figures when
C-bus status. The 5-bit code may be used to
Chapter 10: EM773 I2C-bus interface
2
Figure
C control register that correspond
23,
2
Figure
C block functions: start
UM10415
© NXP B.V. 2010. All rights reserved.
24,
Figure
114 of 310
25,