OM13006,598 NXP Semiconductors, OM13006,598 Datasheet - Page 14
OM13006,598
Manufacturer Part Number
OM13006,598
Description
BOARD EVAL EM773 METER EU PLUG
Manufacturer
NXP Semiconductors
Type
Other Power Managementr
Specifications of OM13006,598
Design Resources
Plug Meter Schematics, Gerber Files USB Dongle Schematics, Gerber Files
Main Purpose
Power Management, Energy/Power Meter
Embedded
Yes, MCU, 32-Bit
Utilized Ic / Part
EM773FHN33,551
Interface Type
USB
Maximum Operating Temperature
+ 150 C
Operating Supply Voltage
1.8 V to 3.6 V
Product
Power Management Development Tools
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Primary Attributes
-
Secondary Attributes
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
For Use With/related Products
EM773, OL2381
Other names
568-6681
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NXP Semiconductors
UM10415
User manual
3.4.6 Watchdog oscillator control register
Table 8.
This register configures the watchdog oscillator. The oscillator consists of an analog and a
digital part. The analog part contains the oscillator function and generates an analog clock
(Fclkana). With the digital part, the analog output clock (Fclkana) can be divided to the
required output clock frequency wdt_osc_clk. The analog output frequency (Fclkana) can
be adjusted with the FREQSEL bits between 500 kHz and 3.4 MHz. With the digital part
Fclkana will be divided (divider ratios = 2, 4,...,64) to wdt_osc_clk using the DIVSEL bits.
The output clock frequency of the watchdog oscillator can be calculated as
wdt_osc_clk =
Remark: Any setting of the FREQSEL bits will yield a Fclkana value within ±40% of the
listed frequency value. The watchdog oscillator is the clock source with the lowest power
consumption. If accurate timing is required, use the IRC or system oscillator.
Remark: The frequency of the watchdog oscillator is undefined after reset. The watchdog
oscillator frequency must be programmed by writing to the WDTOSCCTRL register before
using the watchdog oscillator.
Table 9.
Bit
1
31:2
Bit
4:0
8:5
Symbol
FREQRANGE
-
Symbol
DIVSEL
FREQSEL
System oscillator control register (SYSOSCCTRL, address 0x4004 8020) bit
description
Watchdog oscillator control register (WDTOSCCTRL, address 0x4004 8024) bit
description
Fclkana
All information provided in this document is subject to legal disclaimers.
Value
00000 2 × (1 + DIVSEL) = 2
00001 2 × (1 + DIVSEL) = 4
00010 2 × (1 + DIVSEL) = 6
...
11111
0001
0010
0011
0100
0101
0110
⁄
(2 × (1 + DIVSEL))
Rev. 1 — 10 September 2010
Description
Select divider for Fclkana.
wdt_osc_clk =
...
2 × (1 + DIVSEL) = 64
Select watchdog oscillator analog output frequency
(Fclkana).
0.5 MHz
0.8 MHz
1.1 MHz
1.4 MHz
1.6 MHz
1.8 MHz
Value
0
1
-
Description
Determines frequency range for Low-power
oscillator.
1 - 20 MHz frequency range.
15 - 25 MHz frequency range
Reserved
= 7.8 kHz to 1.7 MHz (nominal values).
Fclkana
⁄
(2 × (1 + DIVSEL))
Chapter 3: EM773 System configuration
UM10415
© NXP B.V. 2010. All rights reserved.
Reset
value
0x0
0x00
Reset
value
0x00
0x00
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