OM13006,598 NXP Semiconductors, OM13006,598 Datasheet - Page 22

• Manufacturer Part Number: OM13006,598
• Description: BOARD EVAL EM773 METER EU PLUG
• Manufacturer: NXP Semiconductors
• Type: Other Power Managementr

Specifications of OM13006,598

• Design Resources: Plug Meter Schematics, Gerber Files USB Dongle Schematics, Gerber Files
• Main Purpose: Power Management, Energy/Power Meter
• Embedded: Yes, MCU, 32-Bit
• Utilized Ic / Part: EM773FHN33,551
• Interface Type: USB
• Maximum Operating Temperature: + 150 C
• Operating Supply Voltage: 1.8 V to 3.6 V
• Product: Power Management Development Tools
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Primary Attributes: -
• Secondary Attributes: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• For Use With/related Products: EM773, OL2381
• Other names: 568-6681

NXP Semiconductors
UM10415
User manual
3.4.21 CLKOUT clock source update enable register
3.4.22 CLKOUT clock divider register
3.4.23 POR captured PIO status register 0
Table 23.
This register updates the clock source of the CLKOUT pin with the new clock after the
CLKOUTCLKSEL register has been written to. In order for the update to take effect at the
input of the CLKOUT pin, first write a zero to the CLKCLKUEN register and then write a
one to CLKCLKUEN.
Table 24.
This register determines the divider value for the clock output signal on the CLKOUT pin.
Table 25.
The PIOPORCAP0 register captures the state (HIGH or LOW) of the PIO pins of ports 0,1,
and 2 (pins PIO2_0 to PIO2_7) at power-on-reset. Each bit represents the reset state of
one GPIO pin. This register is a read-only status register.
Bit
1:0
31:2
Bit
0
31:1
Bit
7:0
31:8
Symbol
SEL
-
Symbol
ENA
-
Symbol
DIV
-
CLKOUT clock source select register (CLKOUTCLKSEL, address 0x4004 80E0) bit
description
CLKOUT clock source update enable register (CLKOUTUEN, address 0x4004
80E4) bit description
CLKOUT clock divider registers (CLKOUTCLKDIV, address 0x4004 80E8) bit
description
All information provided in this document is subject to legal disclaimers.
Value
00
01
10
11
-
Value
0
1
to
255
-
Value
0
1
-
Rev. 1 — 10 September 2010
Description
CLKOUT clock source
IRC oscillator
System oscillator
Watchdog oscillator
Main clock
Reserved
Description
Clock divider values
Disable
Divide by 1
...
Divide by 255
Reserved
Description
Enable CLKOUT clock source update
No change
Update clock source
Reserved
Chapter 3: EM773 System configuration
UM10415
© NXP B.V. 2010. All rights reserved.
Reset value
0x0
0x00
Reset
value
0x00
0x00
Reset
value
0x00
0x00
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