OM13006,598 NXP Semiconductors, OM13006,598 Datasheet - Page 232

• Manufacturer Part Number: OM13006,598
• Description: BOARD EVAL EM773 METER EU PLUG
• Manufacturer: NXP Semiconductors
• Type: Other Power Managementr

Specifications of OM13006,598

• Design Resources: Plug Meter Schematics, Gerber Files USB Dongle Schematics, Gerber Files
• Main Purpose: Power Management, Energy/Power Meter
• Embedded: Yes, MCU, 32-Bit
• Utilized Ic / Part: EM773FHN33,551
• Interface Type: USB
• Maximum Operating Temperature: + 150 C
• Operating Supply Voltage: 1.8 V to 3.6 V
• Product: Power Management Development Tools
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Primary Attributes: -
• Secondary Attributes: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• For Use With/related Products: EM773, OL2381
• Other names: 568-6681

NXP Semiconductors
UM10415
User manual
20.3.1.4 Exceptions and interrupts
20.3.1.5 Data types
20.3.1.6 The Cortex Microcontroller Software Interface Standard
Table 223. CONTROL register bit assignments
Handler mode always uses the MSP, so the processor ignores explicit writes to the active
stack pointer bit of the CONTROL register when in Handler mode. The exception entry
and return mechanisms update the CONTROL register.
In an OS environment, it is recommended that threads running in Thread mode use the
process stack and the kernel and exception handlers use the main stack.
By default, Thread mode uses the MSP. To switch the stack pointer used in Thread mode
to the PSP, use the MSR instruction to set the Active stack pointer bit to 1, see
Section
Remark: When changing the stack pointer, software must use an ISB instruction
immediately after the MSR instruction. This ensures that instructions after the ISB execute
using the new stack pointer. See
The Cortex-M0 processor supports interrupts and system exceptions. The processor and
the Nested Vectored Interrupt Controller (NVIC) prioritize and handle all exceptions. An
interrupt or exception changes the normal flow of software control. The processor uses
handler mode to handle all exceptions except for reset. See
Section 20–20.3.3.6.2
The NVIC registers control interrupt handling. See
information.
The processor:
ARM provides the Cortex Microcontroller Software Interface Standard (CMSIS) for
programming Cortex-M0 microcontrollers. The CMSIS is an integrated part of the device
driver library.
Bits
[31:2]
[1]
[0]
•
•
supports the following data types:
– 32-bit words
– 16-bit halfwords
– 8-bit bytes
manages all data memory accesses as little-endian. Instruction memory and Private
Peripheral Bus (PPB) accesses are always little-endian. See
more information.
20–20.4.7.6.
All information provided in this document is subject to legal disclaimers.
Name
-
Active stack
pointer
-
Rev. 1 — 10 September 2010
for more information.
Chapter 20: Appendix EM773 ARM Cortex-M0 reference
Section
Function
Reserved
Defines the current stack:
0 = MSP is the current stack pointer
1 = PSP is the current stack pointer.
In Handler mode this bit reads as zero and ignores writes.
Reserved.
20–20.4.7.5.
Section 20–20.5.2
Section 20–20.3.3.6.1
Section 20–20.3.2.1
for more
UM10415
© NXP B.V. 2010. All rights reserved.
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