OM13006,598 NXP Semiconductors, OM13006,598 Datasheet - Page 233

• Manufacturer Part Number: OM13006,598
• Description: BOARD EVAL EM773 METER EU PLUG
• Manufacturer: NXP Semiconductors
• Type: Other Power Managementr

Specifications of OM13006,598

• Design Resources: Plug Meter Schematics, Gerber Files USB Dongle Schematics, Gerber Files
• Main Purpose: Power Management, Energy/Power Meter
• Embedded: Yes, MCU, 32-Bit
• Utilized Ic / Part: EM773FHN33,551
• Interface Type: USB
• Maximum Operating Temperature: + 150 C
• Operating Supply Voltage: 1.8 V to 3.6 V
• Product: Power Management Development Tools
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Primary Attributes: -
• Secondary Attributes: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• For Use With/related Products: EM773, OL2381
• Other names: 568-6681

NXP Semiconductors
UM10415
User manual
20.3.2 Memory model
The CMSIS includes address definitions and data structures for the core peripherals in the
Cortex-M0 processor. It also includes optional interfaces for middleware components
comprising a TCP/IP stack and a Flash file system.
The CMSIS simplifies software development by enabling the reuse of template code, and
the combination of CMSIS-compliant software components from various middleware
vendors. Software vendors can expand the CMSIS to include their peripheral definitions
and access functions for those peripherals.
This document includes the register names defined by the CMSIS, and gives short
descriptions of the CMSIS functions that address the processor core and the core
peripherals.
Remark: This document uses the register short names defined by the CMSIS. In a few
cases these differ from the architectural short names that might be used in other
documents.
The following sections give more information about the CMSIS:
This section describes the processor memory map and the behavior of memory accesses.
The processor has a fixed memory map that provides up to 4GB of addressable memory.
The memory map is:
For a Cortex-M0 microcontroller system, CMSIS defines:
•
•
•
•
•
•
•
a common way to:
– access peripheral registers
– define exception vectors
the names of:
– the registers of the core peripherals
– the core exception vectors
a device-independent interface for RTOS kernels.
Section 20.3.5.3 “Power management programming hints”
Section 20.4.2 “Intrinsic functions”
Section 20.5.2.1 “Accessing the Cortex-M0 NVIC registers using CMSIS”
Section 20.5.2.8.1 “NVIC programming
All information provided in this document is subject to legal disclaimers.
Rev. 1 — 10 September 2010
Chapter 20: Appendix EM773 ARM Cortex-M0 reference
hints”.
UM10415
© NXP B.V. 2010. All rights reserved.
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